FPGA EDA (eBook)

Design Principles and Implementation

Kaihui Tu, Xifan Tang, Cunxi Yu, Lana Josipović, Zhufei Chu (Autoren)

eBook Download: PDF

2024 | 1st ed. 2024
XIII, 227 Seiten
Springer Nature Singapore (Verlag)
978-981-99-7755-0 (ISBN)

Infos

This book focuses on FPGA EDA tools, the very foundation of FPGA technology. Instead of illustrating how to use them, this book dives into the tools themselves, revealing how these tools are being designed and how they may improve. Unlike other semiconductors, FPGA has a distinctive two-stage EDA system: chip design EDA and application design EDA.State-of-the-art algorithms, data models and design methodologies/standards are the main concerns of this book, and these will be very helpful for FPGA EDA engineers and researchers to obtain a bird's eye view of this complicated knowledge system. In the chip design EDA part, full-custom and semicustom methodologies bring up ASIC-like EDA tools, and in the application design EDA side, typical topics including high-level synthesis, logic synthesis, physical implementation, bitstream configuration, etc., are well discussed.

?Kaihui Tu, MSc in Communications, University of York, York, UK. PhD in Microelectronics and Solid State Electronics, University of Chinese Academy of Sciences, Beijing, China. Tu has participated in numbers of Chinese national research projects, including China's first 10K logic cell FPGA project, first embedded FPGA IP project and first TSV-based 3D FPGA project. With over ten years' working experience in Chinese Academy of Sciences, Tu was responsible for architecting the eFPGA IP EDA tools that had won the 'Made in China research IP Prize' at IP SoC China 2019.

Xifan Tang, PhD in Computer Science, graduated from École Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland. CTO and cofounder of Rapid-Flex. Tang is also the maintainer of OpenFPGA project. 

Cunxi Yu, PhD in Computer Engineering, graduated from University of Massachusetts Amherst, Massachusetts, USA. Currently works as Assistant Professor at University of Maryland, College Park. Dr. Yu was Assistant Professor at University of Utah, and held PostDoc positions at Cornell and EPFL. 

Yu's major academic honor includes: ACM/IEEE Design Automation Conference (DAC 2023) Best Paper Award • American Physics Society LPR Poster Honorable Mention (2022) • NSF CAREER Award (2021) • 2017 ASP-DAC Best Paper Nomination • ACM Doctoral Dissertation Award Nomination (by UMass Amherst) • DAC 2017 Security Contest - 1st Place.

Lana Josipovic currently works as Assistant Professor at ETH Zurich. She got her PhD in Computer and Communication Sciences graduated in 2021 from École Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland. Dr. Josipovic's major academic honor includes Best Paper Award Nominee at the 30th Intl. Symposium on Field-Programmable Custom Computing Machines (2022), Fritz Kutter Award for best Swiss industry-related PhD thesis in Computer Science, awarded by ETH Zurich (2021) , and Best Paper Award at the 28th Intl. Symposium on Field Programmable Gate Array (2020).

Zhufei Chu currently works as Professor at Ningbo University, China, and held PostDoc position at École Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland. He is also the maintainer of open source logic synthesis project ALSO.

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This book focuses on FPGA EDA tools, the very foundation of FPGA technology. Instead of illustrating how to use them, this book dives into the tools themselves, revealing how these tools are being designed and how they may improve. Unlike other semiconductors, FPGA has a distinctive two-stage EDA system: chip design EDA and application design EDA.State-of-the-art algorithms, data models and design methodologies/standards are the main concerns of this book, and these will be very helpful for FPGA EDA engineers and researchers to obtain a bird's eye view of this complicated knowledge system. In the chip design EDA part, full-custom and semicustom methodologies bring up ASIC-like EDA tools, and in the application design EDA side, typical topics including high-level synthesis, logic synthesis, physical implementation, bitstream configuration, etc., are well discussed.