Low Power Design with High-Level Power Estimation and Power-Aware Synthesis

Sumit Ahuja, Avinash Lakshminarayana, Sandeep Kumar Shukla (Autoren)

Buch | Softcover

170 Seiten

2014
Springer-Verlag New York Inc.
978-1-4899-8780-8 (ISBN)

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This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.

Introduction.- Related Work.- Background.- Architectural Selection using High Level Synthesis.- Statistical Regression Based Power Models.- Coprocessor Design Space Exploration Using High Level Synthesis.- Regression-based Dynamic Power Estimation for FPGAs.- High Level Simulation Directed RTL Power Estimation.- Applying Verification Collaterals for Accurate Power Estimation.- Power Reduction using High-Level Clock-gating.- Model-Checking to exploit Sequential Clock-gating.- System Level Simulation Guided Approach for Clock-gating.- Conclusions.

Erscheint lt. Verlag	23.10.2014
Zusatzinfo	XXII, 170 p.
Verlagsort	New York
Sprache	englisch
Maße	155 x 235 mm
Themenwelt	Informatik ► Weitere Themen ► CAD-Programme
	Technik ► Elektrotechnik / Energietechnik
	Technik ► Maschinenbau
ISBN-10	1-4899-8780-0 / 1489987800
ISBN-13	978-1-4899-8780-8 / 9781489987808
Zustand	Neuware