The Boundary — Scan Handbook
Springer-Verlag New York Inc.
978-1-4613-5041-5 (ISBN)
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In February of 1990, the balloting process for the IEEE proposed standard P1149.1 was completed creating IEEE Std 1149.1-1990. Later that summer, in record time, the standard won ratification as an ANSI standard as well. This completed over six years of intensive cooperative effort by a diverse group of people who share a vision on solving some of the severe testing problems that exist now and are steadily getting worse. Early in this process, someone asked me if 1 thought that the P1l49.l effort would ever bear fruit. 1 responded somewhat glibly that "it was anyone's guess". Well, it wasn't anyone's guess, but rather the faith of a few individuals in the proposition that many testing problems could be solved if a multifaceted industry could agree on a standard for all to follow. Four of these individuals stand out; they are Harry Bleeker, Colin Maunder, Rodham Tulloss, and Lee Whetsel. In that I am convinced that the 1149.1 standard is the most significant testing development in the last 20 years, I personally feel a debt of gratitude to them and all the people who labored on the various Working Groups in its creation.
1 Boundary-Scan Basics and Vocabulary.- 1.1 Digital Test Before Boundary-Scan.- 1.2 The Philosophy of 1149.1.- 1.3 Basic Architecture.- 1.4 Non-Invasive Operational Modes.- 1.5 Pin-Permission Operational Modes.- 1.6 Extensibility.- 1.7 Subordination of IEEE 1149.1.- 1.8 Costs and Benefits.- 1.9 Other Testability Standards.- 2 Boundary-Scan Description Language (BSDL).- 2.1 The Scope of BSDL.- 2.2 Structure of BSDL.- 2.3 Entity Descriptions.- 2.4 Some advanced BSDL Topics.- 2.5 BSDL Description of 74BCT8374.- 2.6 Packages and Package Bodies.- 2.7 Writing BSDL.- 2.8 Summary.- 3 Boundary-Scan Testing.- 3.1 Basic Boundary-Scan Testing.- 3.2 Testing with Boundary-Scan Chains.- 3.3 Porting Boundary-Scan Tests.- 3.4 Boundary-Scan Test Coverage.- 3.5 Summary.- 4 Advanced Boundary-Scan Topics.- 4.1 DC Parametric IC Tests.- 4.2 Sample Mode Tests.- 4.3 Concurrent Monitoring.- 4.4 Non-Scan IC Testing.- 4.5 Non-Digital Device Testing.- 4.6 Mixed Digital/Analog Testing.- 4.7 Multi-Chip Module Testing.- 4.8 Firmware Development Support.- 4.9 In-System Configuration.- 4.10 Flash Programming.- 4.11 Hardware Fault Insertion.- 4.12 Power Pin Testing.- 5 Design for Boundary-Scan Test.- 5.1 Integrated Circuit Level DFT.- 5.2 Board-Level DFT.- 5.3 System-Level DFT.- 5.4 Summary.- 6 Analog Measurement Basics.- 6.1 Analog In-Circuit Testing.- 6.2 Limited Access Testing.- 7 IEEE 1149.4: Analog Boundary-Scan.- 7.1 1149.4 Vocabulary and Basics.- 7.2 General Architecture of an 1149.4 IC.- 7.3 The 1149.4 Instruction Set.- 7.4 Other Provisions of 1149.4.- 7.5 Design for 1149.4 Testability.- 7.6 Summary.- 8 IEEE 1149.6: Testing Advanced I/O.- 8.1 The Advanced I/O Problem.- 8.2 1149.6 Vocabulary and Basics.- 8.3 Test Facilities for Ac Pins.- 8.4 The Defect Model for 1149.6.- 8.5 The 1149.6 Test Receiver.- 8.6 BSDL Extensions for 1149.6.- 8.7 Design for 1149.6 Testability.- 8.8 Summary.- 9 IEEE 1532: In-System Configuration.- 9.1 IEEE 1532 Vocabulary and Basics.- 9.2 Programming Features of IEEE 1532.- 9.3 Design for IEEE 1532 Programmability.- 9.4 Epilog: What Next for 1149.1,1149.4,1149.6 and 1532?.- A. BSDL Syntax Specifications.- A.l Conventions.- A.2 Lexical elements of BSDL.- A.3 Notes on syntax definition.- A.4 BSDL Syntax.- A.5 User Package Syntax.- A.6 1149.6 Extention Attribute Syntax.
| Zusatzinfo | XXVII, 373 p. |
|---|---|
| Verlagsort | New York, NY |
| Sprache | englisch |
| Maße | 155 x 235 mm |
| Themenwelt | Informatik ► Weitere Themen ► CAD-Programme |
| Technik ► Elektrotechnik / Energietechnik | |
| ISBN-10 | 1-4613-5041-7 / 1461350417 |
| ISBN-13 | 978-1-4613-5041-5 / 9781461350415 |
| Zustand | Neuware |
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