Analysis and Design of Analog Integrated Circuits (eBook)
976 Seiten
Wiley (Verlag)
978-1-394-22008-3 (ISBN)
Authoritative and comprehensive textbook on the fundamentals of analog integrated circuits, with learning aids included throughout
Written in an accessible style to ensure complex content can be appreciated by both students and professionals, this Sixth Edition of Analysis and Design of Analog Integrated Circuits is a highly comprehensive textbook on analog design, offering in-depth coverage of the fundamentals of circuits in a single volume. To aid in reader comprehension and retention, supplementary material includes end of chapter problems, plus a Solution Manual for instructors.
In addition to the well-established concepts, this Sixth Edition introduces a new super-source follower circuit and its large-signal behavior, frequency response, stability, and noise properties. New material also introduces replica biasing, describes and analyzes two op amps with replica biasing, and provides coverage of weighted zero-value time constants as a method to estimate the location of dominant zeros, pole-zero doublets (including their effect on settling time and three examples of circuits that create doublets), the effect of feedback on pole-zero doublets, and MOS transistor noise performance (including a thorough treatment on thermally induced gate noise).
Providing complete coverage of the subject, Analysis and Design of Analog Integrated Circuits serves as a valuable reference for readers from many different types of backgrounds, including senior undergraduates and first-year graduate students in electrical and computer engineering, along with analog integrated-circuit designers.
Paul R. Gray, Professor Emeritus, Executive Vice Chancellor and Provost Emeritus, UC Berkeley, CA, USA. Gray joined the faculty of the Department of Electrical Engineering and Computer Sciences at U.C. Berkeley in 1971. His research interests have included bipolar and MOS circuit design, electro-thermal interactions in integrated circuits, device modeling, telecommunications circuits, and analog-digital interfaces in VLSI systems. He is a Fellow of the IEEE.
Paul J. Hurst, Professor, UC Davis, CA, USA. Hurst received his Ph.D. in Electrical Engineering from the University of California, Berkeley, in 1983. His research interests are in analog and mixed-signal integrated circuit design for analog-digital interfaces and digital communications using CMOS technologies.
Stephen H. Lewis, Professor, UC Davis, CA, USA. Lewis received his PhD degree from the University of California, Berkeley, in 1987. His interests include circuit design for data-conversion and signal-processing systems.
Robert G. Meyer, Professor Emeritus, UC Berkeley, CA, USA. Meyer has enjoyed a distinguished career in both academia and industry since joining UCB in 1968. In 2014, he received the IEEE Donald O. Pederson Award for pioneering contributions to the design and modeling of analog and radio-frequency circuits. He holds eight U.S. patents and is a Fellow of the IEEE.
ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Authoritative and comprehensive textbook on the fundamentals of analog integrated circuits, with learning aids included throughout Written in an accessible style to ensure complex content can be appreciated by both students and professionals, this Sixth Edition of Analysis and Design of Analog Integrated Circuits is a highly comprehensive textbook on analog design, offering in-depth coverage of the fundamentals of circuits in a single volume. To aid in reader comprehension and retention, supplementary material includes end of chapter problems, plus a Solution Manual for instructors. In addition to the well-established concepts, this Sixth Edition introduces a new super-source follower circuit and its large-signal behavior, frequency response, stability, and noise properties. New material also introduces replica biasing, describes and analyzes two op amps with replica biasing, and provides coverage of weighted zero-value time constants as a method to estimate the location of dominant zeros, pole-zero doublets (including their effect on settling time and three examples of circuits that create doublets), the effect of feedback on pole-zero doublets, and MOS transistor noise performance (including a thorough treatment on thermally induced gate noise). Providing complete coverage of the subject, Analysis and Design of Analog Integrated Circuits serves as a valuable reference for readers from many different types of backgrounds, including senior undergraduates and first-year graduate students in electrical and computer engineering, along with analog integrated-circuit designers.
CHAPTER 1
Models for Integrated-Circuit Active Devices
1.1 Introduction
The analysis and design of integrated circuits depend heavily on the utilization of suitable models for integrated-circuit components. This is true in hand analysis, where fairly simple models are generally used, and in computer analysis, where more complex models are encountered. Since any analysis is only as accurate as the model used, it is essential that the circuit designer have a thorough understanding of the origin of the models commonly utilized and the degree of approximation involved in each.
This chapter deals with the derivation of large-signal and small-signal models for integrated-circuit devices. The treatment begins with a consideration of the properties of junctions, which are basic parts of most integrated-circuit elements. Since this book is primarily concerned with circuit analysis and design, no attempt has been made to produce a comprehensive treatment of semiconductor physics. The emphasis is on summarizing the basic aspects of semiconductor-device behavior and indicating how these can be modeled by equivalent circuits.
1.2 Depletion Region of a pn Junction
The properties of reverse-biased junctions have an important influence on the characteristics of many integrated-circuit components. For example, reverse-biased junctions exist between many integrated-circuit elements and the underlying substrate, and these junctions all contribute voltage-dependent parasitic capacitances. In addition, a number of important characteristics of active devices, such as breakdown voltage and output resistance, depend directly on the properties of the depletion region of a reverse-biased junction. Finally, the basic operation of the junction field-effect transistor is controlled by the width of the depletion region of a junction. Because of its importance and application to many different problems, an analysis of the depletion region of a reverse-biased junction is considered below. The properties of forward-biased junctions are treated in Section 1.3 when bipolar-transistor operation is described.
Consider a junction under reverse bias as shown in Fig. 1.1. Assume constant doping densities of atoms/cm3 in the -type material and atoms/cm3 in the -type material. (The characteristics of junctions with nonconstant doping densities will be described later.) Due to the difference in carrier concentrations in the -type and -type regions, there exists a region at the junction where the mobile holes and electrons have been removed, leaving the fixed acceptor and donor ions. Each acceptor atom carries a negative charge and each donor atom carries a positive charge, so that the region near the junction is one of significant space charge and resulting high electric field. This is called the depletion region or space-charge region. It is assumed that the edges of the depletion region are sharply defined, as shown in Fig. 1.1, and this is a good approximation in most cases.
Figure 1.1 The abrupt junction under reverse bias . (a) Schematic. (b) Charge density. (c) Electric field. (d ) Electrostatic potential.
For zero applied bias, there exists a voltage across the junction called the built-in potential. This potential opposes the diffusion of mobile holes and electrons across the junction in equilibrium and has a value1
where
the quantity is the intrinsic carrier concentration in a pure sample of the semiconductor and at K for silicon.
In Fig. 1.1, the built-in potential is augmented by the applied reverse bias, , and the total voltage across the junction is . If the depletion region penetrates a distance into the -type region and into the -type region, then we require
because the total charge per unit area on either side of the junction must be equal in magnitude but opposite in sign.
Poisson's equation in one dimension requires that
where is the charge density, is the electron charge ( coulomb), and is the permittivity of the silicon ( farad/cm). The permittivity is often expressed as
where is the dielectric constant of silicon and is the permittivity of free space ( F/cm). Integration of (1.3) gives
where is a constant. However, the electric field is given by
Since there is zero electric field outside the depletion region, a boundary condition is
and use of this condition in (1.6) gives
Thus the dipole of charge existing at the junction gives rise to an electric field that varies linearly with distance.
Integration of (1.7) gives
If the zero for potential is arbitrarily taken to be the potential of the neutral -type region, then a second boundary condition is
and use of this in (1.8) gives
At , we define , and then (1.9) gives
If the potential difference from to is , then it follows that
and thus the total voltage across the junction is
Substitution of (1.2) in (1.12) gives
From (1.13), the penetration of the depletion layer into the -type region is
Similarly,
Equations 1.14 and 1.15 show that the depletion regions extend into the -type and -type regions in inverse relation to the impurity concentrations and in proportion to . If either or is much larger than the other, the depletion region exists almost entirely in the lightly doped region.
EXAMPLE
An abrupt junction in silicon has doping densities atoms/cm3 and atoms/cm3. Calculate the junction built-in potential, the depletion-layer depths, and the maximum field with 10 V reverse bias.
From (1.1),
From (1.14), the depletion-layer depth in the -type region is
The depletion-layer depth in the more heavily doped -type region is
Finally, from (1.7), the maximum field that occurs for is
Note the large magnitude of this electric field.
1.2.1 Depletion-Region Capacitance
Since there is a voltage-dependent charge associated with the depletion region, we can calculate a small-signal capacitance as follows:
Now
where is the cross-sectional area of the junction. Differentiation of (1.14) gives
Use of (1.17) and (1.18) in (1.16) gives
The above equation was derived for the case of reverse bias applied to the diode. However, it is valid for positive bias voltages as long as the forward current flow is small. Thus, if represents the bias on the junction (positive for forward bias, negative for reverse bias), then (1.19) can be written as
where is the value of for .
Figure 1.2 Charge density versus distance in a graded junction.
Figure 1.3 Behavior of junction depletion-layer capacitance as a function of bias voltage .
Equations 1.20 and 1.21 were derived using the assumption of constant doping in the -type and n-type regions. However, many practical diffused junctions more closely approach a graded doping profile, as shown in Fig. 1.2. In this case, a similar calculation yields
Note that both (1.21) and (1.22) predict values of approaching infinity as approaches . However, the current flow in the diode is then appreciable and the equations are no longer valid. A more exact analysis[2, 3] of the behavior of as a function of gives the result shown in Fig. 1.3. For forward-bias voltages up to about , the values of predicted by (1.21) are very close to the more accurate value. As an approximation, some computer programs approximate for by a linear extrapolation of (1.21) or (1.22).
EXAMPLE
If the zero-bias capacitance of a diffused junction is 3 pF and V, calculate the capacitance with 10 V reverse bias. Assume the doping profile can be approximated by an abrupt junction.
From (1.21),
1.2.2 Junction Breakdown
From Fig. 1.1c, it can be seen that the maximum electric field in the depletion region occurs at the junction; and for an abrupt junction, (1.7) yields a value
Substitution of (1.14) in (1.23) gives
where has been neglected. Equation 1.24 shows that the maximum field increases as the...
Erscheint lt. Verlag | 4.1.2024 |
---|---|
Sprache | englisch |
Themenwelt | Technik ► Elektrotechnik / Energietechnik |
ISBN-10 | 1-394-22008-1 / 1394220081 |
ISBN-13 | 978-1-394-22008-3 / 9781394220083 |
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