Digital Logic and Microprocessor Design with VHDL
Nelson Engineering (Verlag)
978-0-534-46593-3 (ISBN)
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Dr. Enoch Hwang has a Ph.D. in Computer Science from the University of California, Riverside. He currently serves as a Professor of Computer Science at La Sierra University in Southern California, teaching digital logic and microprocessor design. In 2015, Dr. Hwang was invited to serve as a visiting professor to Zhejiang University in Hangzhou, China, where he taught their Digital Systems Design course. Many new ideas from that class have been incorporated into this edition of the book. From as early as childhood, Dr. Hwang was fascinated with electronic circuits. In one of his first experiments, he attempted to connect a microphone to the speaker inside a portable radio through the earphone plug. Instead of hearing sound from the microphone through the speaker, smoke was seen coming out of the radio. Thus ended that experiment and his family’s only radio. He now continues on his interest in digital circuits with research in embedded microprocessor systems, controller automation, power optimization, and robotics.
Chapter 1. Designing Microprocessors
1.1Overview of a Microprocessor
1.2Design Abstraction Levels
1.3Examples of a 2-to-1 Multiplexer
1.4Introduction to VHDL
1.5Synthesis
1.6Going Forward
1.7Summary Checklist
1.8Problems
Chapter 2. Digital Circuits
2.1Binary Numbers
2.2Binary Switch
2.3Basic Logic Operators and Logic Expressions
2.4Truth Tables
2.5Boolean Algebra and Boolean Function
2.6Minterms and Maxterms
2.7Canonical, Standard, and non-Standard Forms
2.8Logic Gates and Circuit Diagrams
2.9Example: Designing a Car Security System
2.10 VHDL for Digital Circuits
2.11 Summary Checklist
2.12 Problems
Chapter 3. Combinational Circuits
3.1Analysis of Combinational Circuits
3.2Synthesis of Combinational Circuits
3.3* Technology Mapping
3.4Minimization of Combinational Circuits
3.5* Timing Hazards and Glitches
3.67-Segment Decoder Example
3.7VHDL for Combinational Circuits
3.8Summary Checklist
3.9Problems
Chapter 4. Standard Combinational Components
4.1Signal Naming Conventions
4.2Adder
4.3Twos Complement Binary Numbers
4.4Subtractor
4.5Adder-Subtractor Combination
4.6Arithmetic Logic Unit
4.7Decoder
4.8Encoder
4.9Multiplexer
4.10 Tri-state Buffer
4.11 Comparator
4.12 Shifter-Rotator
4.13 Multiplier
4.14 Summary Checklist
4.15 Problems
Chapter 5. * Implementation Technologies
5.1Physical Abstraction
5.2Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET)
5.3CMOS Logic
5.4CMOS Circuits
5.5Analysis of CMOS Circuits
5.6Using ROMs to Implement a Function
5.7Using PLAs to Implement a Function
5.8Using PALs to Implement a Function
5.9Complex Programmable Logic Device (CPLD)
5.10 Field-Programmable Gate Array (FPGA)
5.11 Summary Checklist
5.12 Problems
Chapter 6. Latches and Flip-Flops
6.1Bistable Element
6.2SR Latch
6.3SR Latch with Enable
6.4D Latch
6.5D Latch with Enable
6.6Clock
6.7D Flip-Flop
6.8D Flip-Flop with Enable
6.9Asynchronous Inputs
6.10 Description of a Flip-Flop
6.11 Timing Issues
6.12 Example: Car Security System - Version 2
6.13 VHDL for Latches and Flip-Flops
6.14 * Flip-Flop Types
6.15 Summary Checklist
6.16 Problems
Chapter 7. Sequential Circuits
7.1Finite-State-Machine (FSM) Model
7.2State Diagrams
7.3Analysis of Sequential Circuits
7.4Synthesis of Sequential Circuits
7.5Unused State Encodings and the Encoding of States
7.6Example: Car Security System - Version 3
7.7VHDL for Sequential Circuits
7.8* Optimization for Sequential Circuits
7.9Summary Checklist
7.10 Problems
Chapter 8. Standard Sequential Components
8.1Registers
8.2Shift Registers
8.3Counters
8.4Register Files
8.5Static Random Access Memory
8.6* Larger Memories
8.6.1 More Memory Locations
8.7Summary Checklist
8.8Problems
Chapter 9. Datapaths
9.1General Datapath
9.2Using a General Datapath
9.3Timing Issues
9.4A More Complex General Datapath
9.5Dedicated Datapath
9.6Designing Dedicated Datapaths
9.7Using a Dedicated Datapath
9.8VHDL for Datapaths
9.9Summary Checklist
9.10 Problems
Chapter 10. Control Units
10.1 Constructing the Control Unit
10.2 Examples
10.3 Generating Status Signals
10.4 Timing Issues
10.5 Standalone Controllers
10.6 * ASM Charts and State Action Tables
10.7 VHDL for Control Units
10.8 Summary Checklist
10.9 Problems
Chapter 11. Dedicated Microprocessors
11.1 Manual Construction of a Dedicated Microprocessor
11.2 Examples
11.3 VHDL for Dedicated Microprocessors
11.4 Summary Checklist
11.5 Problems
Chapter 12. General-Purpose Microprocessors
12.1 Overview of the CPU Design
12.2 The EC-1 General-Purpose Microprocessor
12.3 The EC-2 General-Purpose Microprocessor
12.4 VHDL for General-Purpose Microprocessors
12.5 Summary Checklist
12.6 Problems
Appendix A. Schematic Entry Tutorial 1
A.1 Getting Started
A.2 Using the Graphic Editor
A.3 Specifying the Top-Level File and Project
A.4 Synthesis for Functional Simulation
A.5 Circuit Simulation
A.6 Creating and Using the Logic Symbol
Appendix B. VHDL Entry Tutorial 2
B.1 Getting Started
B.2 Synthesis for Functional Simulation
B.3 Circuit Simulation
Appendix C. UP2 Programming Tutorial 3
C.1 Getting Started
C.2 Synthesis for Programming the PLD
C.3 Circuit Simulation
C.4 Using the Floorplan Editor
C.5 Fitting the Netlist and Pins to the PLD
C.6 H ardware Setup
C.7 Programming the PLD
C.8 Testing the Hardware
C.9 MAX7000S EPM7128SLC84-7 Summary
C.10 FLEX10K EPF10K70RC240-4 Summary
Appendix D. VHDL Summary
D.1 Basic Language Elements
D.2 Dataflow Model Concurrent Statements
D.3 Behavioral Model Sequential Statements
D.4 Structural Model Statements
D.5 Conversion Routines
Index
| Erscheint lt. Verlag | 18.2.2005 |
|---|---|
| Verlagsort | Florence, KY |
| Sprache | englisch |
| Maße | 210 x 242 mm |
| Gewicht | 1170 g |
| Themenwelt | Technik ► Elektrotechnik / Energietechnik |
| ISBN-10 | 0-534-46593-5 / 0534465935 |
| ISBN-13 | 978-0-534-46593-3 / 9780534465933 |
| Zustand | Neuware |
| Haben Sie eine Frage zum Produkt? |
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