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Functional Verification of Programmable Embedded Architectures - Prabhat Mishra, Nikil D. Dutt

Functional Verification of Programmable Embedded Architectures

A Top-Down Approach
Buch | Softcover
180 Seiten
2014
Springer-Verlag New York Inc.
978-1-4899-7336-8 (ISBN)
CHF 167,95 inkl. MwSt
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It is widely acknowledged that the cost of validation and testing comprises a s- nificant percentage of the overall development costs for electronic systems today, and is expected to escalate sharply in the future. Many studies have shown that up to 70% of the design development time and resources are spent on functional verification. Functional errors manifest themselves very early in the design flow, and unless they are detected up front, they can result in severe consequence- both financially and from a safety viewpoint. Indeed, several recent instances of high-profile functional errors (e. g. , the Pentium FDIV bug) have resulted in - creased attention paid to verifying the functional correctness of designs. Recent efforts have proposed augmenting the traditional RTL simulation-based validation methodology with formal techniques in an attempt to uncover hard-to-find c- ner cases, with the goal of trying to reach RTL functional verification closure. However, what is often not highlighted is the fact that in spite of the tremendous time and effort put into such efforts at the RTL and lower levels of abstraction, the complexity of contemporary embedded systems makes it difficult to guarantee functional correctness at the system level under all possible operational scenarios. The problem is exacerbated in current System-on-Chip (SOC) design meth- ologies that employ Intellectual Property (IP) blocks composed of processor cores, coprocessors, and memory subsystems. Functional verification becomes one of the major bottlenecks in the design of such systems.

to Functional Verification.- Architecture Specification.- Architecture Specification.- Validation of Specification.- Top-Down Validation.- Executable Model Generation.- Design Validation.- Functional Test Generation.- Future Directions.- Conclusions.

Erscheint lt. Verlag 4.12.2014
Zusatzinfo XIX, 180 p.
Verlagsort New York
Sprache englisch
Maße 155 x 235 mm
Themenwelt Informatik Theorie / Studium Künstliche Intelligenz / Robotik
Informatik Weitere Themen CAD-Programme
Technik Elektrotechnik / Energietechnik
ISBN-10 1-4899-7336-2 / 1489973362
ISBN-13 978-1-4899-7336-8 / 9781489973368
Zustand Neuware
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