Developing a Design Flow for Embedded Systems
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This thesis covers the electronic system level (ESL) design of embedded systems motivated by the practical relevance of these systems. Thereby, the design concepts have been extended according to the state of the art addressing an early design stage. This includes a new methodology, new models, and new methods aiming at an improved time, quality, and cost for the design of embedded systems. A special focus is set to the future many-core system-on-chips (SoCs) composed of clusters, where each cluster represents a set of heterogeneous intellectual property (IP) cores. The developed methodology realizes a more systematic ESL design. Moreover, the implemented system functions are inter-dependent and integrated in the system models. Principally, a separation into computation resources, data logistic resources, and resource management is followed. In addition, the developed design methods solve complex design problems of the targeted many-core SoCs. A new programming language for the design automation is also deployed in the course of this thesis. It allows to develop, manage, and optimize design flows. Finally, the contributions of this thesis are demonstrated in a case study for the heterogeneous multicluster architecture.
The First part of this thesis introduces the new concept of an executable design flow and describes a unified methodology for the systematic development of design fows. A First example illustrates the functional design of a digital Filter. Then, the modeling of systems and design flows is unified. It is shown that domain-specific design flows can also be derived from a unified abstract design flow model. The λ-chart, proposed in this thesis, represents a flow model for the ESL design of many-core SoCs. Moreover, the developed system functions of the targeted many-core SoCs are presented to be further integrated in the simulation models. In this context, two new schemes for the fair arbitration of link bandwidth in a network-on-chip have been developed. Another important contribution concerns the introduction of several design methods solving the design problems of the many-core SoCs. This includes two estimation techniques and several formulations of optimization problems via mixed-integer linear programming
and genetic algorithms.
Further important contributions relate to new automation features for ESL design. The presented programming language allows for developing design flows in terms of a computer program, used by the introduced automation tools. In addition, the simulation models, design methods, and automation functions are accessible for a wider community via a development framework. An integrated development environment combines the development of design flows with the available solutions of the design problems.
In the final part of this thesis, a case study of the heterogeneous multicluster architecture demonstrates the usage of the ESL design methodology, simulation models, and design methods under realistic conditions. First, the focus is on the search of suitable input parameters of the design methods. Then, a systematic dimensioning of the multicluster architecture will be applied in terms of the necessary computation resources. Thereafter, an adequate interconnect topology is generated. This allows to compare the available arbitration schemes concerning their impact on the system performance. In addition, a performance evaluation of several estimators of cluster load is applied. The case study shows that the design flow of future many-core SoCs includes various complex design problems. They can be effciently solved through an ESL design avoiding the time-consuming simulations at a lower abstraction level, such as register-transfer level.
The First part of this thesis introduces the new concept of an executable design flow and describes a unified methodology for the systematic development of design fows. A First example illustrates the functional design of a digital Filter. Then, the modeling of systems and design flows is unified. It is shown that domain-specific design flows can also be derived from a unified abstract design flow model. The λ-chart, proposed in this thesis, represents a flow model for the ESL design of many-core SoCs. Moreover, the developed system functions of the targeted many-core SoCs are presented to be further integrated in the simulation models. In this context, two new schemes for the fair arbitration of link bandwidth in a network-on-chip have been developed. Another important contribution concerns the introduction of several design methods solving the design problems of the many-core SoCs. This includes two estimation techniques and several formulations of optimization problems via mixed-integer linear programming
and genetic algorithms.
Further important contributions relate to new automation features for ESL design. The presented programming language allows for developing design flows in terms of a computer program, used by the introduced automation tools. In addition, the simulation models, design methods, and automation functions are accessible for a wider community via a development framework. An integrated development environment combines the development of design flows with the available solutions of the design problems.
In the final part of this thesis, a case study of the heterogeneous multicluster architecture demonstrates the usage of the ESL design methodology, simulation models, and design methods under realistic conditions. First, the focus is on the search of suitable input parameters of the design methods. Then, a systematic dimensioning of the multicluster architecture will be applied in terms of the necessary computation resources. Thereafter, an adequate interconnect topology is generated. This allows to compare the available arbitration schemes concerning their impact on the system performance. In addition, a performance evaluation of several estimators of cluster load is applied. The case study shows that the design flow of future many-core SoCs includes various complex design problems. They can be effciently solved through an ESL design avoiding the time-consuming simulations at a lower abstraction level, such as register-transfer level.
| Erscheint lt. Verlag | 19.2.2013 |
|---|---|
| Sprache | englisch |
| Maße | 1480 x 2100 mm |
| Gewicht | 230 g |
| Einbandart | Paperback |
| Themenwelt | Technik ► Elektrotechnik / Energietechnik |
| Schlagworte | Design Flow • Developing a Design Flow for Embedded Systems • Embedded Systems |
| ISBN-10 | 3-938860-61-8 / 3938860618 |
| ISBN-13 | 978-3-938860-61-8 / 9783938860618 |
| Zustand | Neuware |
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