Architecture Design for Soft Errors (eBook)

Shubu Mukherjee (Autor)

eBook Download: PDF

2011 | 1. Auflage
360 Seiten
Elsevier Science (Verlag)
978-0-08-055832-5 (ISBN)

Infos

This book provides a comprehensive description of the architetural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them. To provide readers with a better grasp of the broader problem deffinition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques.

TABLE OF CONTENTS
Chapter 1: Introduction
Chapter 2: Device- and Circuit-Level Modeling, Measurement, and Mitigation
Chapter 3: Architectural Vulnerability Analysis
Chapter 4: Advanced Architectural Vulnerability Analysis
Chapter 5: Error Coding Techniques
Chapter 6: Fault Detection via Redundant Execution
Chapter 7: Hardware Error Recovery
Chapter 8: Software Detection and Recovery

* Provides the methodologies necessary to quantify the effect of radiation-induced soft errors as well as state-of-the-art techniques to protect against them

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Architecture Design for Soft Errors provides a comprehensive description of the architectural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them. To provide readers with a better grasp of the broader problem definition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques. There are a number of different ways this book can be read or used in a course: as a complete course on architecture design for soft errors covering the entire book; a short course on architecture design for soft errors; and as a reference book on classical fault-tolerant machines. This book is recommended for practitioners in semi-conductor industry, researchers and developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in computer architecture. - Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors- Shows readers how to quantify their soft error reliability- Provides state-of-the-art techniques to protect against soft errors

Inhalt

Front Cover 1
Architecture Design for Soft Errors 4
Copyright Page 5
Table of Contents 8
Foreword 14
Preface 18
Chapter 1. Introduction 24
1.1 Overview 24
1.2 Faults 29
1.3 Errors 30
1.4 Metrics 32
1.5 Dependability Models 34
1.6 Permanent Faults in Complementary Metal Oxide Semiconductor Technology 37
1.7 Radiation-Induced Transient Faults in CMOS Transistors 43
1.8 Architectural Fault Models for Alpha Particle and Neutron Strikes 53
1.9 Silent Data Corruption and Detected Unrecoverable Error 55
1.10 Soft Error Scaling Trends 59
1.11 Summary 61
1.12 Historical Anecdote 62
References 63
Chapter 2. Device and Circuit-Level Modeling Measurement and Mitigation 66
2.1 Overview 66
2.2 Modeling Circuit-Level SERs 67
2.3 Measurement 83
2.4 Mitigation Techniques 90
2.5 Summary 97
2.6 Historical Anecdote 99
References 99
Chapter 3. Architectural Vulnerability Analysis 102
3.1 Overview 102
3.2 AVF Basics 103
3.3 Does a Bit Matter? 104
3.4 SDC and DUE Equations 105
3.5 ACE Principles 113
3.6 Microarchitectural Un-ACE Bits 116
3.7 Architectural Un-ACE Bits 117
3.8 AVF Equations for a Hardware Structure 119
3.9 Computing AVF with Little’s Law 121
3.10 Computing AVF with a Performance Model 124
3.11 ACE Analysis Using the Point-of-Strike Fault Model 129
3.12 ACE Analysis Using the Propagated Fault Model 137
3.13 Summary 141
3.14 Historical Anecdote 141
References 142
Chapter 4. Advanced Architectural Vulnerability Analysis 144
4.1 Overview 144
4.2 Lifetime Analysis of RAM Arrays 146
4.3 Lifetime Analysis of CAM Arrays 157
4.4 Effect of Cooldown in Lifetime Analysis 161
4.5 AVF Results for Cache, Data Translation Buffer, and Store Buffer 163
4.6 Computing AVFs Using SFI into an RTL Model 169
4.7 Case Study of SFI 175
4.8 Summary 181
4.9 Historical Anecdote 182
References 183
Chapter 5. Error Coding Techniques 184
5.1 Overview 184
5.2 Fault Detection and ECC for State Bits 185
5.3 Error Detection Codes for Execution Units 204
5.4 Implementation Overhead of Error Detection and Correction Codes 210
5.5 Scrubbing Analysis 213
5.6 Detecting False Errors 217
5.7 Hardware Assertions 223
5.8 Machine Check Architecture 225
5.9 Summary 226
5.10 Historical Anecdote 228
References 228
Chapter 6. Fault Detection via Redundant Execution 230
6.1 Overview 230
6.2 Sphere of Replication 231
6.3 Fault Detection via Cycle-by-Cycle Lockstepping 235
6.4 Lockstepping in the Hewlett-Packard NonStop Himalaya Architecture 241
6.5 Lockstepping in the IBM Z-series Processors 243
6.6 Fault Detection via RMT 245
6.7 RMT in the Marathon Endurance Server 246
6.8 RMT in the Hewlett-Packard NonStop® Advanced Architecture 248
6.9 RMT Within a Single-Processor Core 250
6.10 RMT in a Multicore Architecture 263
6.11 DIVA: RMT Using Specialized Checker Processor 264
6.12 RMT Enhancements 267
6.13 Summary 270
6.14 Historical Anecdote 271
References 273
Chapter 7. Hardware Error Recovery 276
7.1 Overview 276
7.2 Classification of Hardware Error Recovery Schemes 277
7.3 Forward Error Recovery 281
7.4 Backward Error Recovery with Fault Detection before Register Commit 286
7.5 Backward Error Recovery with Fault Detection before Memory Commit 300
7.6 Backward Error Recovery with Fault Detection before I/O Commit 306
7.7 Backward Error Recovery with Fault Detection after I/O Commit 315
7.8 Summary 315
7.9 Historical Anecdote 317
References 317
Chapter 8. Software Detection and Recovery 320
8.1 Overview 320
8.2 Fault Detection Using SIS 322
8.3 Fault Detection Using Software RMT 324
8.4 Fault Detection Using Hybrid RMT 332
8.5 Fault Detection Using RVMs 336
8.6 Application-Level Recovery 338
8.7 OS-Level and VMM-Level Recoveries 345
8.8 Summary 346
References 347
Index 350

Produkt-Details

• Erscheint lt. Verlag: 29.8.2011
• Sprache: englisch
• Themenwelt: Sachbuch/Ratgeber
• Themenwelt: Mathematik / Informatik ► Informatik ► Theorie / Studium
• Themenwelt: Mathematik / Informatik ► Mathematik
• Themenwelt: Technik ► Elektrotechnik / Energietechnik
• ISBN-10: 0-08-055832-1 / 0080558321
• ISBN-13: 978-0-08-055832-5 / 9780080558325