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Reconfigurable Obfuscation Techniques for the IC Supply Chain - Zain Ul Abideen, Samuel Pagliarini

Reconfigurable Obfuscation Techniques for the IC Supply Chain

Using FPGA-Like Schemes for Protection of Intellectual Property
Buch | Hardcover
XVI, 199 Seiten
2025
Springer International Publishing (Verlag)
978-3-031-77508-6 (ISBN)
CHF 74,85 inkl. MwSt
  • Noch nicht erschienen - erscheint am 23.01.2025
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This book explores the essential facets of security threats arising from the globalized IC supply chain. Contemporary semiconductor companies navigate a globalized IC supply chain, exposing them to various threats such as Intellectual Property (IP) piracy, reverse engineering, overproduction, and malicious logic insertion. Several obfuscation techniques, including split manufacturing, design camouflaging, and Logic Locking (LL), have been proposed to counter these threats. This book describes a new security method for the silicon industry, the Tunable Design Obfuscation Technique, which uses a reconfigurability feature in the chip to make it harder to understand and protect it from rogue elements.   

Zain Ul Abideen received his Ph.D. from Tallinn University of Technology (TalTech), Tallinn, Estonia, and his M.S. degree in computer engineering (Master in Integration, Security and Trust in Embedded systems) from Grenoble Institute of Technology, Grenoble, France. He is currently a postdoctoral researcher at Carnegie Mellon University, Pittsburgh, PA, USA. His research primarily focuses on ASIC design, hardware security, PUFs, TRNGs, reliable hardware designs, and post-quantum cryptography.

Samuel Pagliarini received his PhD from Telecom ParisTech, Paris, France, in 2013. He has held research positions with the University of Bristol, Bristol, UK, and Carnegie Mellon University, Pittsburgh, PA, USA. From 2019 to 2023, he led the Centre for Hardware Security at Tallinn University of Technology in Tallinn, Estonia. He is currently a professor at Carnegie Mellon University, Pittsburgh, PA, USA.

Introduction.- Background.- A Security-aware CAD Flow for the Obfuscation Method.- Physical Implementation.- Security Analysis.- Securing the Bitstream of hASIC.

Erscheint lt. Verlag 23.1.2025
Reihe/Serie Synthesis Lectures on Digital Circuits & Systems
Zusatzinfo Approx. 200 p.
Verlagsort Cham
Sprache englisch
Maße 168 x 240 mm
Themenwelt Mathematik / Informatik Informatik Theorie / Studium
Informatik Weitere Themen Hardware
Technik Elektrotechnik / Energietechnik
Schlagworte Design for Trust • Hardware obfuscation • hardware security • Secure ASIC design • Trustworthy IC
ISBN-10 3-031-77508-2 / 3031775082
ISBN-13 978-3-031-77508-6 / 9783031775086
Zustand Neuware
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