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Next Generation Mechanism for Data Encryption -

Next Generation Mechanism for Data Encryption

Buch | Hardcover
336 Seiten
2025
CRC Press (Verlag)
978-1-032-83284-5 (ISBN)
CHF 209,45 inkl. MwSt
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This book gives readers a deep insight into cryptography and discusses the various types of cryptography algorithms used for the encryption and decryption of data such as asymmetry encryption, digital signatures, and hash functions. It also covers the mathematics behind the use of algorithms for encryption and decryption.
This book gives readers a deep insight into cryptography and discusses the various types of cryptography algorithms used for the encryption and decryption of data. It also covers the mathematics behind the use of algorithms for encryption and decryption.

Features



Presents clear insight to the readers about the various security algorithms and the different mechanisms used for data encryption.
Discusses algorithms such as symmetry encryption, asymmetry encryption, digital signatures, and hash functions used for encryption.
Covers techniques and methods to optimize the mathematical steps of security algorithms to make those algorithms lightweight which can be suitable for voice encryption.
Illustrates software methods to implement cryptography algorithms.
Highlights a comparative analysis of models which are used in implementing cryptography algorithms.

The text is primarily written for senior undergraduates, graduate students, and academic researchers in the fields of electrical engineering, electronics and communications engineering, computer science and engineering, and information technology.

Keshav Kumar is presently working as an assistant professor, at Chandigarh University, India. He is pursuing his PhD from the National Institute of Technology Patna, India. His area of interest is the implementation of security algorithms on FPGA, power-efficient devices on FPGA, and green communication. He has worked with researchers from countries like Denmark, Italy, and Malaysia in the field of low-power VLSI design on FPGA and energy-efficient devices for Green Communication. He has authored and co-authored more than 39+ research papers in the field of hardware security, green communication, low-power VLSI design, machine learning techniques, and the Internet of Things. Bishwajeet Pandey is presently working as a professor, in the Department of Intelligent Systems and Information Security, at Astana IT University, Kazakhstan. He completed his Ph.D. in Computer Science Engineering from Gran Sasso Science Institute, L'Aquila, Italy. He has authored and co-authored more than 170 research papers and published in journals of national and international repute. He has experience teaching courses including innovation and startup, computer network, digital logic, logic synthesis, and system Verilog. His areas of research interest are green computing, high-performance computing, cyber-physical systems, artificial intelligence, machine learning, and cyber security.

1. Oepning the Vault for Securing the Communication: An Introduction to Cryptography. 2. Guardians of Privacy: Unrevaling Public-Key Cryptography. 3. Cryptography Algorithms to Prevent the Different Security Attacks. 4. Hash Functions and Message Digest. 5. Quantum Cryptography. 6. Cryptanalysis using Crypt Tool and Alpha Peeler. 7. Quantum Cryptography: An In-Depth Exploration of Principles and Techniques. 8. Securing Patient Information: A Multi-layered Cryptographic Approach in IoT Healthcare. 9. Exploring Advancements, Applications, and Challenges in the Realm of Quantum Cryptography. 10. Cryptography in Industry: Safeguarding Digital Assets and Transactions. 11. Cryptography in Practice. 12. Output Load Capacitance Scaling Based Low Power Design of ECC Algorithm. 13. Implementation of Lattice Based Cryptography Cyber Forensic System. 14. Cryptography in Digital Forensics. 15. Cryptography Tools in Ethical Hacking. 16. Exploring the Future Trends of Cryptography. 17. Safeguarding the Future through the Prevention of Cybercrime in the Quantum Computing Era. 18. Low Power Design of DES Encryption Algorithm on 28 nm FPGA Using HSTL IO Standard.

Erscheint lt. Verlag 2.1.2025
Zusatzinfo 24 Tables, black and white; 53 Line drawings, black and white; 51 Halftones, black and white; 104 Illustrations, black and white
Verlagsort London
Sprache englisch
Maße 156 x 234 mm
Themenwelt Mathematik / Informatik Informatik Software Entwicklung
Technik Elektrotechnik / Energietechnik
Technik Nachrichtentechnik
Technik Umwelttechnik / Biotechnologie
ISBN-10 1-032-83284-3 / 1032832843
ISBN-13 978-1-032-83284-5 / 9781032832845
Zustand Neuware
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