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Multi-Gigahertz Nyquist Analog-to-Digital Converters - Athanasios T. Ramkaj, Marcel J.M. Pelgrom, Michiel S. J. Steyaert, Filip Tavernier

Multi-Gigahertz Nyquist Analog-to-Digital Converters

Architecture and Circuit Innovations in Deep-Scaled CMOS and FinFET Technologies
Buch | Hardcover
XXV, 269 Seiten
2023 | 1st ed. 2023
Springer International Publishing (Verlag)
978-3-031-22708-0 (ISBN)
CHF 164,75 inkl. MwSt
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This book proposes innovative circuit, architecture, and system solutions in deep-scaled CMOS and FinFET technologies, which address the challenges in maximizing the accuracy*speed/power of multi-GHz sample rate and bandwidth Analog-to-Digital Converters (ADC)s. A new holistic approach is introduced that first identifies the major error sources of a converter' building blocks, and quantitatively analyzes their impact on the overall performance, establishing the fundamental circuit-imposed accuracy - speed - power limits. The analysis extends to the architecture level, by introducing a mathematical framework to estimate and compare the accuracy - speed - power limits of several ADC architectures and variants. To gain system-level insight, time-interleaving is covered in detail, and a framework is also introduced to compare key metrics of interleaver architectures quantitatively. The impact of technology is also considered by adding process effects from several deep-scaled CMOS technologies.

The validity of the introduced analytical approach and the feasibility of the proposed concepts are demonstrated by four silicon prototype Integrated Circuits (IC)s, realized in ultra-deep-scaled CMOS and FinFET technologies.

  • Introduces a new, holistic approach for the analysis and design of high-performance ADCs in deep-scaled CMOS technologies, from theoretical concepts to silicon bring-up and verification;
  • Describes novel methods and techniques to push the accuracy - speed - power boundaries of multi-GHz ADCs, analyzing core and peripheral circuits' trade-offs across the entire ADC chain;
  • Supports the introduced analysis and design concepts by four state-of-the-art silicon prototype ICs, implemented in 28nm bulk CMOS and 16nm FinFET technologies;
  • Provides a useful reference and a valuable tool for beginners as well as experienced ADC design engineers.

lt;p> Athanasios T. Ramkaj received the M.Sc. degree (cum laude) in electrical engineering (microelectronics) from TU Delft, Delft, The Netherlands, and the Ph.D. degree (summa cum laude) in electrical engineering from KU Leuven, Leuven, Belgium, in 2014 and 2021, respectively. Since June 2021, he has been with the Murmann Mixed-Signal Group, Stanford University, Stanford, CA USA, as a postdoctoral research fellow. In parallel, he is also a visiting researcher at Kilby Labs, Texas Instruments, Santa Clara, CA USA, investigating multi-GHz ultra-low jitter A/D solutions. From 2013 to 2014, he was an AMS research/design intern in the Central Research & Development Department of NXP Semiconductors, Eindhoven, The Netherlands, where he worked on GHz-range A/D converters for communication systems. In 2019, he was an AMS research/design intern with the High-Speed Data Converters group of Analog Devices Inc., Wilmington, MA USA, investigating highly integrated solutions for bandwidth extension of next generation RF A/D converters. His main research interests include high-speed/bandwidth high-resolution RF sampling A/D converters, high-speed analog/mixed-signal circuits for wireline and wireless systems, ultra-wideband receiver front ends, and ultra-low jitter clocking.

Dr. Ramkaj is the recipient of the 2021 Analog Devices Outstanding Student Designer Award, the 2019-2020 IEEE Solid-State Circuits Society Predoctoral Achievement Award, and the 2015 IEEE PRIME Golden Leaf Best Student Paper Award. He also serves as a reviewer for the IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION SYSTEMS, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, and IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS.

Introduction.- Analog-to-Digital Conversion Fundamentals.- Architectural Considerations for High-Efficiency GHz-Range ADCs.- Ultrahigh-Speed High-Sensitivity Dynamic Comparator.- High-Speed Wide-Bandwidth Single-Channel SAR ADC.- High-Resolution Wide-Bandwidth Time-Interleaved RF ADC.- Ultra-Wideband Direct RF Receiver Analog Front End.- Conclusions, Contributions, and Future Work. 

Erscheinungsdatum
Reihe/Serie Analog Circuits and Signal Processing
Zusatzinfo XXV, 269 p. 167 illus., 131 illus. in color.
Verlagsort Cham
Sprache englisch
Maße 155 x 235 mm
Gewicht 592 g
Themenwelt Informatik Weitere Themen Hardware
Technik Elektrotechnik / Energietechnik
Schlagworte deep-scaled CMOS ADC • High-Efficiency GHz-Range ADCs • High-Speed Wide-Bandwidth Single-Channel SAR ADC • multi-GHz ADC • Ultrahigh-Speed High-Sensitivity Dynamic Comparator
ISBN-10 3-031-22708-5 / 3031227085
ISBN-13 978-3-031-22708-0 / 9783031227080
Zustand Neuware
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