Software Defined Chips (eBook)

Volume I

Shaojun Wei, Leibo Liu, Jianfeng Zhu, Chenchen Deng (Autoren)

eBook Download: PDF

2022 | 1st ed. 2022
VI, 311 Seiten
Springer Nature Singapore (Verlag)
978-981-19-6994-2 (ISBN)

Infos

This is the first book of a two-volume book set which introduces software defined chips. In this book, it introduces the conceptual evolution of software defined chips from the development of integrated circuits and computing architectures. Technical principles, characteristics and key issues of software defined chips are systematically analyzed. The hardware architecture design methods are described involving architecture design primitives, hardware design spaces and agile design methods. From the perspective of the compilation system, the complete process from high-level language to configuration contexts is introduced in detail.

This book is suitable for scientists and researchers in the areas of electrical and electronic engineering and computer science. Postgraduate students, practitioners and professionals in related areas are also potentially interested in the topic of this book.

Shaojun Wei (Fellow, IEEE) received the Ph.D. degree from the La Faculté Polytechnique de Mons, Mons, Belgium, in 1991. He is a professor at the School of Integrated Circuits, Tsinghua University, Beijing, China, His main research interests include reconfigurable computing VLSI system-on-chip (SoC) design, electronic design automation (EDA) methodology and application specific integrated circuit (ASIC) design for communications. Prof. Wei has published more than 230 peer-reviewed journal and conference papers, 9 books/book chapters with one of them being the first book on Reconfigurable Computing in China and nearly 100 international patents with several winning national awards. The main contributions of Prof. Wei are acknowledged by (1) dynamically reconfigurable computing pattern, (2) reconfigurable cell array architecture supporting highly efficient implementation of control-intensive applications, (3) configuration information mapping mechanism improving performance and power consumption. These technologies found applications in multimedia, cryptographic and neural processors, as well as processors for data centers. They not only laid the ground for software defined chips but were also highly appreciated by industry leaders such as Intel. Since 2009, Intel has carried out large projects with Prof. Wei's team for collaborative research and development. Prof. Wei has been coordinating the strategic plan for the semiconductor development in China as the leading expert of the '863 program' since 2000 and as the chief scientist of 'National Key Projects of Science and Technology' for more than 10 years. His enormous contributions to IC design during the past 20 years have earned him the IEEE CAS Industrial Pioneer Award. 

Leibo Liu received B.S. and Ph.D. from Tsinghua University in 1999 and 2004, respectively. He is a tenured professor of the School of Integrated Circuits at Tsinghua University. His research interests include reconfigurable computing, hardware security and cryptographic engines. 

Jianfeng Zhu received the B.S. and Ph.D. degrees in electronic science and technology from Tsinghua University, Beijing, China, in 2008 and 2015, respectively. He is currently with School of Integrated Circuits, Tsinghua University. His current research interests include software defined chips, the architecture and compilation of CGRA, hardware security and low-power design.

Chenchen Deng received the B.S. in Electronic Engineering from Beijing University of Posts and Telecommunications, China, in 2007 and the D.Phil. in Engineering Science from University of Oxford, UK, in 2012. She now works as an assistant research fellow at Beijing National Research Center for Information Science and Technology, Tsinghua University, Beijing. Her current research interests include software defined chips, reconfigurable computing, energy-efficient computing systems and design methods for hardware security.

Produkt-Details

• Erscheint lt. Verlag: 20.10.2022
• Zusatzinfo: VI, 311 p. 158 illus., 71 illus. in color.
• Sprache: englisch
• Themenwelt: Mathematik / Informatik ► Informatik ► Theorie / Studium
• Themenwelt: Informatik ► Weitere Themen ► Hardware
• Themenwelt: Technik ► Elektrotechnik / Energietechnik
• Schlagworte: Coarse Grained Reconfigurable Architecture • Compilation System • Computer Architecture • Hardware Architecture • Programmable Architecture • reconfigurable computing • Reconfigurable Processors • Reconfigurable Systems • Software Defined Chips • Software Defined Hardware
• ISBN-10: 981-19-6994-9 / 9811969949
• ISBN-13: 978-981-19-6994-2 / 9789811969942