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Beyond Binary Memory Circuits - Zarin Tasnim Sandhie, Farid Uddin Ahmed, Masud H. Chowdhury

Beyond Binary Memory Circuits

Multiple-Valued Logic
Buch | Hardcover
XXIII, 95 Seiten
2022 | 1st ed. 2022
Springer International Publishing (Verlag)
978-3-031-16194-0 (ISBN)
CHF 119,80 inkl. MwSt
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This book provides readers with an overview of the fundamental definitions and features of Multiple-Valued Logic (MVL). The authors include a brief discussion of the historical development of MVL technologies, while the main goal of the book is to present a comprehensive review of different technologies that are being explored to implement multiple-valued or beyond-binary memory circuits and systems. The discussion includes the basic features, prospects, and challenges of each technology, while highlighting the significant works done on different branches of MVL memory architecture, such as sequential circuits, random access memory, Flash memory, etc.

Zarin T. Sandhie received the B.Sc degree in Electrical and Electronic Engineering from Bangladesh University of Engineering and Technology (BUET), Dhaka, Bangladesh in 2015. She received her M.S. and Ph.D. degree in Electrical and Computer Engineering from University of Missouri-Kansas City in 2020 and 2021 respectively. She authored ~10 research publications during her M.S. and Ph.D. research. Her research interests include Multiple-Valued Logic (MVL), ternary logic, and Graphene-Nano-Ribbon Field Effect Transistor (GNRFET). Zarin was awarded the UMKC School of Graduate Studies Research Grant in 2018. She got the 1st prize in UMKC hack-a-roo 2018. She completed her internship as a graduate intern at Intel in the Atom CPU Design Team. Currently she is working as SoC Design Engineer in the IPG group in Intel Corporation.
Farid U. Ahmed received the B.Sc degree in Electrical and Electronic Engineering from Bangladesh University of Engineering and Technology (BUET), Dhaka, Bangladesh in 2015. He completed his M.S. and Ph.D. from the Computer Science and Electrical Engineering Department of University of Missouri-Kansas City (UMKC), USA. He authored/co-authored 11 publications as a PhD student. Farid was awarded the UMKC School of Graduate Studies Research Grant in 2017. Currently he is working as SoC Design Engineer in the Standard Cell library Design Team at Intel. His research interests include on-chip power management integrated circuit (PMIC), design Automation of analog circuit and Multi-Valued Logic (MVL).

Masud H Chowdhury received the B.S. degree in electrical and electronic engineering from Bangladesh University of Engineering and Technology (BUET), Dhaka in 1998 and the Ph.D. degree in computer engineering from Northwestern University, Evanston, Illinois, USA in 2004. Currently, he is the Interim Department Chair and Associate Dean of the School of Computing and Engineering at the University of Missouri - Kansas City (UMKC). He has published more than 150 articles in various journals and conferences in his fields of research, which includes (i) high performance issues of deep submicron and nanoscale integrated circuits and (ii) emerging 2D nanomaterials and ferroelectric material based devices and circuits for computing, memory, sensing and energy applications. He is the co-founder and director of Center for Interdisciplinary Nano Technology Research (CINTR) at UMKC. Dr. Chowdhury has served as the Chair of IEEE VLSI Systems and Applications Technical Committee from 2014 to 2016. He is also serving as the Associate Editors of (i) IEEE Transactions on VLSI Systems, (ii) Microelectronics Journal of Elsevier, (iii) IEEE Transactions on Circuits and Systems II (TCAS II), and (iv) Journal of Circuits, Systems, and Signal Processing, Springer. He has been serving the professional communities in many other capacities for more than a decade.


The History of Multi-Valued Logic.- Mathematical Representation of Multi-Valued Logic.- Scopes of MVL Technology.- Overview of Different Technologies for Multiple-Valued Memory.- MVL in Memory Designs.- Challenges and Future Directions.- Conclusion.

Erscheinungsdatum
Reihe/Serie Synthesis Lectures on Digital Circuits & Systems
Zusatzinfo XXIII, 95 p. 50 illus., 18 illus. in color.
Verlagsort Cham
Sprache englisch
Maße 168 x 240 mm
Gewicht 372 g
Themenwelt Mathematik / Informatik Informatik Theorie / Studium
Informatik Weitere Themen Hardware
Technik Elektrotechnik / Energietechnik
Schlagworte Memory Circuit Design • Multiple-valued logic design • Multiple-Valued Memory • multiple-valued memory cells • MVL in Memory Designs
ISBN-10 3-031-16194-7 / 3031161947
ISBN-13 978-3-031-16194-0 / 9783031161940
Zustand Neuware
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