Lifetime Reliability-aware Design of Integrated Circuits
Springer International Publishing (Verlag)
978-3-031-15344-0 (ISBN)
This book covers the state-of-the-art research in design of modern electronic systems used in safety-critical applications such as medical devices, aircraft flight control, and automotive systems. The authors discuss lifetime reliability of digital systems, as well as an overview of the latest research in the field of reliability-aware design of integrated circuits. They address modeling approaches and techniques for evaluation and improvement of lifetime reliability for nano-scale CMOS digital circuits, as well as design algorithms that are the cornerstone of Computer Aided Design (CAD) of reliable VLSI circuits. In addition to developing lifetime reliability analysis and techniques for clocked storage elements (such as flip-flops), the authors also describe analysis and improvement strategies targeting commercial digital circuits.
Mohsen Raji received his Ph.D. degree in computer engineering from Amirkabir University of Technology, Tehran, Iran. He has been serving as a faculty member in School of Electrical and Computer Engineering, Shiraz University, Shiraz, Iran, since 2015. He teaches courses such as VLSI systems design, microprocessors, embedded systems, fault tolerant system design. He has supervised or co-supervised about 10 graduate students and published over 30 refereed papers. He is serving as an associated editor of Iranian Journal of Science and Technology, Transactions of Electrical Engineering. His current research interests include dependable computing, reliable and robust logic designs, design automation of digital systems, and embedded systems. Behnam Ghavami was born in Esfarayen, Iran. He received his Ph.D. degree in computer engineering from Amirkabir University of Technology, Tehran, Iran. He has been serving as a Faculty Member with the Computer Engineering Department, Shahid Bahonar University of Kerman, since 2010, where he is currently an Associate Professor. He teaches courses in design and test of digital systems, computer architecture, embedded processor design, and reliable circuit design. He has supervised or co-supervised about 20 graduate students. He has published over 100 refereed papers. His research interests include the design automation of digital systems, computer architecture, statistical analysis, robust logic designs, and embedded processors. He is currently an Associate Editor of the Journal of Electronic Testing-Springer and Microelectronics Journal-Elsevier. He has a decade of industry experience, including working on FPGA in automotive industry.
1. Impacts of Process Variations and Aging on Lifetime Reliability of Flip-Flops.- 2 Restructuring-based Lifetime Reliability Improvement of Nano-scale Master-Slave Flip-Flops.- 3 Lifetime Reliability Improvement of Pulsed Flip-Flops.- 4 Gate Sizing-based Lifetime Reliability Improvement of Integrated Circuits.- 5 Joint Timing Yield and Lifetime Reliability Optimization of Integrated Circuits.- 6 Lifetime Reliability Optimization Algorithms of Integrated Circuits using Dual Threshold Voltage Assignment.
| Erscheinungsdatum | 18.11.2022 |
|---|---|
| Zusatzinfo | XIII, 107 p. 31 illus., 13 illus. in color. |
| Verlagsort | Cham |
| Sprache | englisch |
| Maße | 155 x 235 mm |
| Gewicht | 314 g |
| Themenwelt | Informatik ► Weitere Themen ► Hardware |
| Technik ► Elektrotechnik / Energietechnik | |
| Schlagworte | Ageing of Integrated Circuits • Reliability Analysis of Flip-Flops • reliability of digital systems • Reliability of Nanometer VLSI Systems • reliability of nano-scale CMOS digital circuits |
| ISBN-10 | 3-031-15344-8 / 3031153448 |
| ISBN-13 | 978-3-031-15344-0 / 9783031153440 |
| Zustand | Neuware |
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