Compiling Algorithms for Heterogeneous Systems
Morgan and Claypool Life Sciences (Verlag)
978-1-62705-961-9 (ISBN)
Most emerging applications in imaging and machine learning must perform immense amounts of computation while holding to strict limits on energy and power. To meet these goals, architects are building increasingly specialized compute engines tailored for these specific tasks. The resulting computer systems are heterogeneous, containing multiple processing cores with wildly different execution models. Unfortunately, the cost of producing this specialized hardware—and the software to control it—is astronomical. Moreover, the task of porting algorithms to these heterogeneous machines typically requires that the algorithm be partitioned across the machine and rewritten for each specific architecture, which is time consuming and prone to error.
Over the last several years, the authors have approached this problem using domain-specific languages (DSLs): high-level programming languages customized for specific domains, such as database manipulation, machine learning, or image processing. By giving up generality, these languages are able to provide high-level abstractions to the developer while producing high performance output. The purpose of this book is to spur the adoption and the creation of domain-specific languages, especially for the task of creating hardware designs.
In the first chapter, a short historical journey explains the forces driving computer architecture today. Chapter 2 describes the various methods for producing designs for accelerators, outlining the push for more abstraction and the tools that enable designers to work at a higher conceptual level. From there, Chapter 3 provides a brief introduction to image processing algorithms and hardware design patterns for implementing them. Chapters 4 and 5 describe and compare Darkroom and Halide, two domain-specific languages created for image processing that produce high-performance designs for both FPGAs and CPUs from the same source code, enabling rapid design cycles and quick porting of algorithms. The final section describes how the DSL approach also simplifies the problem of interfacing between application code and the accelerator by generating the driver stack in addition to the accelerator configuration.
This book should serve as a useful introduction to domain-specialized computing for computer architecture students and as a primer on domain-specific languages and image processing hardware for those with more experience in the field.
Steven Bell is a Ph.D. candidate at Stanford University, where he's building camera platforms as a vehicle to explore the challenge of rapidly creating high-performance hardware/software systems. As part of his Ph.D. work, he has developed imaging algorithms, written kernel drivers, and wrangled FPGA tools. His interests include image processing and computational photography, embedded software and systems, and teaching these topics to others. He received a B.S. in computer engineering from Oklahoma Christian University in 2011.|Jing Pu received a B.S. in microelectronics from Peking University and an M.S. and Ph.D. in electrical engineering from Stanford University. He is currently working on Pixel Visual Core and Halide at Google. During his Ph.D., he worked on programming CPU/FPGA heterogeneous systems from the Halide image processing language. His research interests include domain-specific architectures and compilers, computer vision, and deep learning. James Hegarty is a research scientist whose work looks at developing new hardware design methodologies to enable rapid hardware-software co-design of low power image processing and computer vision systems. James' recent work involved the development of the Darkroom and Rigel image processing hardware languages. Previously, James worked on graphics systems, where he helped develop a novel real-time GPU rendering system that reduced shading load by 9x on micropolygon workloads. James holds a B.S., M.S., and Ph.D. in computer science from Stanford University. Mark Horowitz is the Yahoo! Founders Professor at Stanford University and was chair of the Electrical Engineering Department from 2008-2012. He co-founded Rambus, Inc. in 1990 and is a fellow of the IEEE and the ACM and a member of the National Academy of Engineering and the American Academy of Arts and Science. Dr. Horowitz's research interests are quite broad and span applying EE and CS analysis methods to problems in molecular biology to creating new design methodologies for analog and digital VLSI circuits. Margaret Martonosi is the Hugh Trumbull Adams '35 Professor of Computer Science at Princeton University, where she has been on the faculty since 1994. She is also currently serving a four-year term as Director of the Keller Center for Innovation in Engineering Education. Martonosi holds affiliated faculty appointments in Princeton EE, the Center for Information Technology Policy (CITP), the Andlinger Center for Energy and the Environment, and the Princeton Environmental Institute. She also holds an affiliated faculty appointment in Princeton EE. From 2005-2007, she served as Associate Dean for Academic Affairs for the Princeton University School of Engineering and Applied Science. In 2011, she served as Acting Director of Princeton's Center for Information Technology Policy (CITP). From August 2015 through March, 2017, she served as a Jefferson Science Fellow within the U.S. Department of State.Martonosi's research interests are in computer architecture and mobile computing, with particular focus on power-efficient systems. Her work has included the development of the Wattch power modeling tool and the Princeton ZebraNet mobile sensor network project for the design and real-world deployment of zebra tracking collars in Kenya. Her current research focuses on hardware-software interface approaches to manage heterogeneous parallelism and power-performance tradeoffs in systems ranging from smartphones to chip multiprocessors to large-scale data centers. Martonosi is a Fellow of both IEEE and ACM. Notable awards include the 2010 Princeton University Graduate Mentoring Award, the 2013 NCWIT Undergraduate Research Mentoring Award, the 2013 Anita Borg Institute Technical Leadership Award, the 2015 Marie Pistilli Women in EDA Achievement Award, the 2015 ISCA Long-Term Influential Paper Award, and the 2017 ACM SIGMOBILE Test-of-Time Award. In addition to many archival publications, Martonosi is an inventor on seven granted US patents, and has co-authored two technical reference books on power-aware computer architecture. She has served on the Board of Directors of the Computing Research Association (CRA), and will co-chair CRA-W from 2017-2020. Martonosi completed her Ph.D. at Stanford University, and also holds a Master's degree from Stanford and a bachelor's degree from Cornell University, all in Electrical Engineering.
Preface
Acknowledgments
Introduction
Computations and Compilers
Image Processing with Stencil Pipelines
Darkroom: A Stencil Language for Image Processing
Programming CPU/FPGA Systems from Halide
Interfacing with Specialized Hardware
Conclusions and Future Directions
Bibliography
Authors' Biographies
| Erscheinungsdatum | 15.02.2018 |
|---|---|
| Reihe/Serie | Synthesis Lectures on Computer Architecture |
| Mitarbeit |
Herausgeber (Serie): Margaret Martonosi |
| Verlagsort | San Rafael, CA |
| Sprache | englisch |
| Maße | 191 x 235 mm |
| Gewicht | 525 g |
| Themenwelt | Informatik ► Grafik / Design ► Digitale Bildverarbeitung |
| Informatik ► Theorie / Studium ► Algorithmen | |
| ISBN-10 | 1-62705-961-X / 162705961X |
| ISBN-13 | 978-1-62705-961-9 / 9781627059619 |
| Zustand | Neuware |
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