Resource Efficient LDPC Decoders (eBook)

From Algorithms to Hardware Architectures

Syed Mahfuzul Aziz, Vikram Arkalgud Chandrasetty (Autoren)

eBook Download: PDF | EPUB

2017 | 1. Auflage
190 Seiten
Elsevier Science (Verlag)
978-0-12-811256-4 (ISBN)

Infos

This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach - from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms.The reader will learn: - Modern techniques to design, model and analyze low complexity LDPC algorithms as well as their hardware implementation - How to reduce computational complexity and power consumption using computer aided design techniques - All aspects of the design spectrum from algorithms to hardware implementation and performance trade-offs - Provides extensive treatment of LDPC decoding algorithms and hardware implementations - Gives a systematic guidance, giving a basic understanding of LDPC codes and decoding algorithms and providing practical skills in implementing efficient LDPC decoders in hardware - Companion website containing C-Programs and MATLAB models for simulating the algorithms, and Verilog HDL codes for hardware modeling and synthesis

Vikram Chandrasetty received Bachelor Degree in Electronics and Communication Engineering from Bangalore University (INDIA), Master Degree in VLSI System Design from Coventry University (UK) and PhD in Computer Systems Engineering from the University of South Australia (Australia). During his post-doctoral research fellowship at the University of New Castle (Australia) he worked on designing spatially coupled LDPC codes and hardware implementations. He reviews articles for many journals including Elsevier and IEEE Transactions. Vikram also has substantial experience as a professional engineer. He has worked on ASIC/FPGA design, error correction coding, electronic design automation, cryptography and communication systems for renowned companies including Motorola and SanDisk. He is currently working on designing memory controllers for next generation storage products in Western Digital.

Produkt-Details

• Erscheint lt. Verlag: 5.12.2017
• Sprache: englisch
• Themenwelt: Mathematik / Informatik ► Informatik ► Netzwerke
• Themenwelt: Naturwissenschaften ► Physik / Astronomie ► Elektrodynamik
• Themenwelt: Technik ► Bauwesen
• Themenwelt: Technik ► Elektrotechnik / Energietechnik
• Themenwelt: Technik ► Nachrichtentechnik
• ISBN-10: 0-12-811256-5 / 0128112565
• ISBN-13: 978-0-12-811256-4 / 9780128112564