On-line Error Detection and Fast Recover Techniques for Dependable Embedded Processors
Seiten
2002
|
2002
Springer Berlin (Verlag)
978-3-540-43318-7 (ISBN)
Springer Berlin (Verlag)
978-3-540-43318-7 (ISBN)
This book presents a new approach to on-line observation and concurrent checking of processors by refining and improving known techniques and introducing new ideas. The proposed on-line error detection and fast recover techniques support and complement other established methods. In combination with other on-line observation priniciples and with a combined hardware-software test, these techniques are used to fulfill a complete self-check scheme for an embedded processor.
This thesis is a summary of my work as a research assistant in the Computer Engineering Research Group of the Computer Science Department at Brandenburg Technical University, Cottbus, Germany. It embraces the concepts, approaches, implementations, and experiments of my work on dependable processor-based embedded systems. I would like to thank all those, who were directly or indirectly involved in the completion of this thesis, for their support. Especially, I am grateful to my supervisor and mentor Prof. Dr. Heinrich-Theodor Vierhaus for the motivation regarding this interesting and versatile topic, for the excellent support of my work, for the permanent technical discussion, and for multitudinous ideas and suggestions. I would like to thank my consultants Prof. Dr.-habil. M. Gössel from the University of Potsdam, Germany and Prof. Dr. Matteo Sonza Reorda from the Politecnico di Torino, Italy for their helpful remarks and hints. My colleagues T. Mohaupt, O. Kluge, and U. Berger, I would like to thank for giving me the benefit of their experiences and critiques. I would like to acknowledge the support of our secretary, Kathleen Lück, with organizational and administrative tasks. Due to her assistence, many bureaucratic hurdles were removed. A special thanks goes to the student members of our research group, Andreas Behling, Christian Galke, Falk Pompsch, Christian Rousselle, Thomas Schwanzara-Bennoit, and Karsten Walther, for their tireless co-operation during various investigations. Finally, I would like to thank my wife Kathrin Pflanz for her infinite patience and support during the preparation of this thesis.
This thesis is a summary of my work as a research assistant in the Computer Engineering Research Group of the Computer Science Department at Brandenburg Technical University, Cottbus, Germany. It embraces the concepts, approaches, implementations, and experiments of my work on dependable processor-based embedded systems. I would like to thank all those, who were directly or indirectly involved in the completion of this thesis, for their support. Especially, I am grateful to my supervisor and mentor Prof. Dr. Heinrich-Theodor Vierhaus for the motivation regarding this interesting and versatile topic, for the excellent support of my work, for the permanent technical discussion, and for multitudinous ideas and suggestions. I would like to thank my consultants Prof. Dr.-habil. M. Gössel from the University of Potsdam, Germany and Prof. Dr. Matteo Sonza Reorda from the Politecnico di Torino, Italy for their helpful remarks and hints. My colleagues T. Mohaupt, O. Kluge, and U. Berger, I would like to thank for giving me the benefit of their experiences and critiques. I would like to acknowledge the support of our secretary, Kathleen Lück, with organizational and administrative tasks. Due to her assistence, many bureaucratic hurdles were removed. A special thanks goes to the student members of our research group, Andreas Behling, Christian Galke, Falk Pompsch, Christian Rousselle, Thomas Schwanzara-Bennoit, and Karsten Walther, for their tireless co-operation during various investigations. Finally, I would like to thank my wife Kathrin Pflanz for her infinite patience and support during the preparation of this thesis.
1. Introduction.- 2. Fault Models and Fault-Behavior of Processor Structures.- 3. On-line Check Technology for Processor Components.- 4. On-line Check Technology for Processor Control Signals.- 5. Fast Processor Recover Techniques with Micro Rollback.- 6. Conclusion and Outlook.
| Erscheint lt. Verlag | 27.2.2002 |
|---|---|
| Reihe/Serie | Lecture Notes in Computer Science |
| Zusatzinfo | XII, 132 p. |
| Verlagsort | Berlin |
| Sprache | englisch |
| Maße | 155 x 233 mm |
| Gewicht | 228 g |
| Themenwelt | Mathematik / Informatik ► Informatik ► Betriebssysteme / Server |
| Mathematik / Informatik ► Informatik ► Software Entwicklung | |
| Mathematik / Informatik ► Informatik ► Theorie / Studium | |
| Informatik ► Weitere Themen ► Hardware | |
| Schlagworte | control systems • dependable processors • embedded processors • Embedded Software • Embedded Systems • error detection • Hardcover, Softcover / Informatik, EDV/Informatik • Hardware • HC/Informatik, EDV/Informatik • online error detection • Processor • Processor Architectures • processor state machines • Prozessor • recover techniques • Signal Processing • Systems-on-Chip |
| ISBN-10 | 3-540-43318-X / 354043318X |
| ISBN-13 | 978-3-540-43318-7 / 9783540433187 |
| Zustand | Neuware |
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