Design Concepts for a Virtualizable Embedded MPSoC Architecture
Enabling Virtualization in Embedded Multi-Processor Systems
Seiten
2014
|
2014
Springer Fachmedien Wiesbaden GmbH (Verlag)
978-3-658-08046-4 (ISBN)
Springer Fachmedien Wiesbaden GmbH (Verlag)
978-3-658-08046-4 (ISBN)
Alexander Biedermann presents a generic hardware-based virtualization approach, which may transform an array of any off-the-shelf embedded processors into a multi-processor system with high execution dynamism. Based on this approach, he highlights concepts for the design of energy aware systems, self-healing systems as well as parallelized systems. For the latter, the novel so-called Agile Processing scheme is introduced by the author, which enables a seamless transition between sequential and parallel execution schemes. The design of such virtualizable systems is further aided by introduction of a dedicated design framework, which integrates into existing, commercial workflows. As a result, this book provides comprehensive design flows for the design of embedded multi-processor systems-on-chip.
Alexander Biedermann completed his doctoral thesis at the Integrated Circuits and Systems Lab, Technische Universität Darmstadt, and at the Center for Advanced Security Research Darmstadt (CASED) under supervision of Prof. Dr.-Ing. Sorin A. Huss.
The Nulticore Dilemma.- Virtualizable Architecture for embedded MPSoC.- The Virtualizable MPSoC: Requirements, Concepts, and Design Flows.- Application Scenarios.- Conclusion and Outlook.
Erscheint lt. Verlag | 20.11.2014 |
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Zusatzinfo | XXVI, 208 p. 125 illus. |
Verlagsort | Wiesbaden |
Sprache | englisch |
Maße | 148 x 210 mm |
Gewicht | 312 g |
Themenwelt | Mathematik / Informatik ► Informatik ► Software Entwicklung |
Informatik ► Weitere Themen ► Hardware | |
Schlagworte | dynamic reconfiguration • Embedded Systems • FPGA • Multi-Processor System-on-Chip • virtualization |
ISBN-10 | 3-658-08046-9 / 3658080469 |
ISBN-13 | 978-3-658-08046-4 / 9783658080464 |
Zustand | Neuware |
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