TRON Project 1990
Springer Verlag, Japan
978-4-431-68131-1 (ISBN)
I wish to extend my warm greetings to you all on behalf of the TRON Association, on this occasion of the Seventh International TRON Project Symposium. The TRON Project was proposed by Dr. Ken Sakamura of the University of Tokyo, with the aim of designing a new, comprehen sive computer architecture that is open to worldwide use. Already more than six years have passed since the project was put in motion. The TRON Association is now made up of over 140 co m panies and organizations, including 25 overseas firms or their affiliates. A basic goal of TRON Project activities is to offer the world a human-oriented computer culture, that will lead to a richer and more fulfilling life for people throughout the world. It is our desire to bring to reality a new order in the world of computers, based on design concepts that consider the needs of human beings first of all, and to enable people to enjoy the full benefits of these com puters in their daily life. Thanks to the efforts of Association members, in recent months a number of TRON-specification 32-bit microprocessors have been made available. ITRON-specification products are continuing to appear, and we are now seeing commercial implementations of BTRON specifications as well. The CTRON subproject, mean while, is promoting standardization through validation testing and a portability experiment, and products are being marketed by sev eral firms. This is truly a year in which the TRON Project has reached the practical implementation stage.
Key Note Address.- Programmable Interface Design in HFDS.- 1: ITRON.- Considerations of the Performance of a Real-Time OS.- Dynamic Stepwise Task Scheduling Algorithm for a Tightly-Coupled Multiprocessor ITRON.- A Graphical Debugger for HI8.- HI8-3X: A AITRON-Specification Realtime Operating System for H8/300 Series Microcontrollers.- 2: BTRON.- Design Policy of the Operating System Based on the BTRON2 Specification.- A Study on a Hypermedia Editor on BTRON1 Specification Operating System.- 3: CTRON.- CTRON Software Portability Evaluation.- Portability Consideration of i386™-Based Basic OS (OS/CT).- OS Subset Structure Achieving AP Portability.- An Evaluation Method of Kernel Products Based on CTRON.- Development of CTRON Operating System for Communication Processing.- 4: CHIP (1).- Implementation and Evaluation of Oki 32-bit Microprocessor 032.- Design Considerations of On-Chip-Type Floating-Point Units.- The Design Method of High Speed Cache Controller/Memory (CCM) for the GMICRO Family Microprocessors.- The Evaluation of M32/100’s Bitmap Instructions Used in the Graphic Primitive.- 5: CHIP (2).- Inline Procedures Boost Performance on TRON Architecture.- A Forth Kernel for Gmicro.- The GMICRO Microprocessor and the AT&T UNIX Operating System.- SRM32: Implementation of Symbolic ROM Monitor on GMICRO F32 Series.- Performance Evaluation of TOXBUS.- Appendix: Additional Contributions.- Realtime OS TR90 Based on Micro-ITRON Specification.- Communication Terminal for Heterogeneous Network Based on BTRON HMI.- Pitfalls on the Road to Portability.- Realization of the Micro-CTRON Kernel under pSOS +.- List of Contributors.- Index of Keywords.
| Zusatzinfo | XI, 436 p. |
|---|---|
| Verlagsort | Tokyo |
| Sprache | englisch |
| Maße | 170 x 244 mm |
| Themenwelt | Mathematik / Informatik ► Informatik ► Betriebssysteme / Server |
| Informatik ► Theorie / Studium ► Künstliche Intelligenz / Robotik | |
| Schlagworte | Rechnerarchitektur |
| ISBN-10 | 4-431-68131-0 / 4431681310 |
| ISBN-13 | 978-4-431-68131-1 / 9784431681311 |
| Zustand | Neuware |
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