Standardized Functional Verification (eBook)

Alan Wiemann (Autor)

eBook Download: PDF

2007 | 2008
XVIII, 276 Seiten
Springer US (Verlag)
978-0-387-71733-3 (ISBN)

Infos

The Integrated Circuit (IC) industry has gone without a standardized verification approach for decades. This book defines a uniform, standardizable methodology for verifying the logical behavior of an integrated circuit, whether an I/O controller, a microprocessor, or a complete digital system. This book will help Engineers and managers responsible for IC development to bring a single, standards-based methodology to their R & D efforts, cutting costs and improving results.

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Standardized Functional Verification describes the science of functional verification that applies to any digital hardware system. With a precise and comprehensive terminology this book describes a thorough technical framework for achieving superior results with greater efficiency. It also defines a scientific basis for achieving functional closure and shows how true functional closure can be measured by software. The author provides a wealth of practical guidance to the practicing professional. It describes how to compare results from differing projects and how to assess the risk of functional bugs at tape-out or at any other critical product juncture. The book also shows consumers how to compare IP offerings from multiple vendors. For producers, it describes how to verify IP in a manner that meets customer needs. Producers and consumers of silicon IP therefore have a solid framework to communicate requirements and to align expectations effectively and efficiently.Standardized Functional Verification is a valuable reference for verification engineers and managers, and also for developers of verification software. The principles and theory this book describes will drive creation of the next generation of verification tools.

Inhalt

Preface 5
What this book is about 7
What this book is not about 8
Who should read this book 9
Scope and Organization of this book 10
Acknowledgements 11
Table of Contents 12
Chapter 1 – A Brief Overview of Functional Verification 17
1.1 Costs and Risk 17
1.2 Verification and Time to Market 18
1.3 Verification and Development Costs 18
1.4 But any L essons L earned? 19
1.5 Functional Verification in a Nutshell 20
1.6 Principles of Constrained Random Verification 21
1.7 Standardized Functional Verification 22
1.8 Summary 23
Chapter 2 – Analytical Foundation 25
2.1 A Note on Terminology 25
2.2 DUTs, DUVs, and Targets 25
2.3 Linear Algebra for Digital System Verification 26
2.4 Standard Variables 28
2.5 Ranges of Variables 29
2.6 Rules and Guidelines 30
2.7 Variables of Connectivity 32
2.8 Variables of Activation 37
2.9 Variables of Condition 40
2.10 Morphs 43
2.11 Variables of Stimulus and Response 45
2.12 Error Imposition 49
2.13 Generating Excitement 51
2.14 Special Cases 51
2.15 Summary 53
References 54
Chapter 3 – Exploring Functional Space 55
3.1 Functional Closure 55
3.2 Counting Function Points 56
3.3 Condensation in the Functional Space 63
3.4 Connecting the Dots 66
3.5 Analyzing an 8-entry Queue 69
3.6 Reset in the VTG 75
3.7 Modeling Faulty Behavior 79
3.8 Back to those Special Cases 80
3.9 A L ittle Graph Theory 81
3.10 Reaching Functional Closure 84
3.11 Summary 86
Chapter 4 – Planning and Execution 87
4.1 Managing Verification Projects 87
4.2 The Goal 88
4.3 Executing the Plan to Obtain Results 89
4.4 Soft Prototype and Hard Prototype 94
4.5 The Verification Plan 95
4.6 Instances, Morphs, and Targets (§ 1) 97
4.7 Clock Domain Crossings (§ 1) 97
4.8 Verifying Changes to an Existing Device (§ 1) 99
4.9 Interpretation of the Specification (§ 1) 99
4.10 Instrumenting the Prototype (§ 2) 103
4.11 Standard Results (§ 3) 107
4.12 Setting Goals for Coverage and Risk (§ 4) 110
4.13 Architecture for Verification Software (§ 5) 111
4.14 Change Management (§ 6) 126
4.15 Organizing the Teams (§ 7) 127
4.16 Tracking Progress (§ 8) 131
4.17 Related Documents (§ 9) 134
4.18 Scope, Schedule and Resources (§ 10) 134
4.19 Summary 135
References 136
Chapter 5 – Normalizing Data 137
5.1 Estimating Project Resources 137
5.2 Power and Convergence 138
5.3 Factors to Consider in using Convergence 140
5.4 Complexity of a Target 142
5.5 Scaling Regression using Convergence 145
5.6 Normalizing Cycle Counts with Complexity 149
5.7 Using Normalized Cycles in Risk Assessment 150
5.8 Bug Count as a Function of Complexity 151
5.9 Comparing Size and Complexity 152
5.10 Summary 152
References 152
Chapter 6 – Analyzing Results 153
6.1 Functional Coverage 153
6.2 Standard Results for Analysis 154
6.3 Statistically Sampling the Function Space 154
6.4 Measures of Coverage 155
6.5 Code Coverage 156
6.6 State Reachability in State Machines 158
6.7 Arc Transversability in State Machines 159
6.8 Fault Coverage 159
6.9 VTG Coverage 160
6.10 Strong Measures and Weak Measures 160
6.11 Standard Measures of Function Space Coverage 161
6.12 Specific Measures and General Measures 162
6.13 Specific Measures for Quadrant I 164
6.14 General Measures for Quadrants II, III, and IV 165
6.15 Multiple Clock Domains 165
6.16 Views of Coverage 166
6.17 Standard Views of Functional Coverage 171
6.18 Summary 172
References 172
Chapter 7 – Assessing Risk 173
7.1 Making Decisions 173
7.2 Some Background on Risk Assessment 175
7.3 Successful Functional Verification 176
7.4 Knowledge and Risk 180
7.5 Coverage and Risk 182
7.6 Data-driven Risk Assessment 183
7.7 VTG Arc Coverage 184
7.8 Using Q to Estimate Risk of a Bug 185
7.9 Bug Count as a Function of Z 190
7.10 Evaluating Commercial IP 190
7.11 Evaluating IP for a Single Application 192
7.12 Nearest Neighbor Analysis 192
7.13 Summary 195
References 197
Appendix – Functional Space of a Queue 198
A.1 Basic 8-entry Queue 198
A.2 Adding an Indirect Condition 201
A.3 Programmable High- and Low-water Marks 205
A.4 Size of the Functional Space for this Queue 205
A.5 Condensation in the Functional Space 206
A.6 No O ther Variables? 208
A.7 VTGs for 8-entry Queue with Programmable HWM & LWM
Index 281

Produkt-Details

• Erscheint lt. Verlag: 23.10.2007
• Zusatzinfo: XVIII, 276 p.
• Verlagsort: New York
• Sprache: englisch
• Themenwelt: Informatik ► Weitere Themen ► CAD-Programme
• Themenwelt: Technik ► Elektrotechnik / Energietechnik
• Schlagworte: Computer-Aided Design (CAD) • Development • Digital Design • Functional verification • Hardware • Integrated circuit • microprocessor • Software • Standard
• ISBN-10: 0-387-71733-1 / 0387717331
• ISBN-13: 978-0-387-71733-3 / 9780387717333