Open Verification Methodology Cookbook (eBook)

Mark Glasser (Autor)

eBook Download: PDF

2009 | 2009
XX, 235 Seiten
Springer New York (Verlag)
978-1-4419-0968-8 (ISBN)

Infos

Functional verification is an art as much as a science. It requires not only creativity and cunning, but also a clear methodology to approach the problem. The Open Verification Methodology (OVM) is a leading-edge methodology for verifying designs at multiple levels of abstraction. It brings together ideas from electrical, systems, and software engineering to provide a complete methodology for verifying large scale System-on-Chip (SoC) designs. OVM defines an approach for developing testbench architectures so they are modular, configurable, and reusable.

This book is designed to help both novice and experienced verification engineers master the OVM through extensive examples. It describes basic verification principles and explains the essentials of transaction-level modeling (TLM). It leads readers from a simple connection of a producer and a consumer through complete self-checking testbenches. It explains construction techniques for building configurable, reusable testbench components and how to use TLM to communicate between them. Elements such as agents and sequences are explained in detail.

Inhalt

Open Verification Methodology Cookbook 2
Preface 6
Contents 12
List of Figures 15
Introduction 19
Verification Principles 21
1.1 Verification Basics 21
1.1.1 Two Questions 22
1.1.2 Does It Work? 22
1.1.3 Are We Done? 25
1.1.4 Two-Loop Flow 26
1.2 First Testbench 27
1.2.1 DUT 29
1.2.2 Scoreboard 30
1.3 Second Testbench 31
1.3.1 3-Bit Counter 33
1.4 Layered Organization of Testbenches 37
1.4.1 Transactors 39
1.4.2 Operational Components 39
1.4.3 Analysis Components 40
1.4.4 Controller 41
1.5 Two Domains 41
1.6 Summary 43
Fundamentals of Object-Oriented Programming 44
2.1 Procedural vs. OOP 44
2.2 Classes and Objects 46
2.3 Object Relationships 50
2.3.1 HAS-A 50
2.3.2 IS-A 51
2.4 Virtual Functions and Polymorphism 53
2.5 Generic Programming 57
2.5.1 Generic Stack 59
2.6 Classes and Modules 62
2.7 OOP and Verification 65
Transaction-Level Modeling 66
3.1 Abstraction 66
3.2 Definition of a Transaction 68
3.3 Interfaces 69
3.4 TLM Idioms 71
3.4.1 Put 71
3.4.2 Get 74
3.4.3 Transport 75
3.4.4 Blocking vs. Nonblocking 78
3.5 Isolating Components with Channels 81
3.6 Forming a Transaction-Level Connection 84
3.7 Summary 85
OVM Mechanics 86
4.1 Components and Hierarchy 86
4.1.1 Traversing the Hierarchy 88
4.1.2 Singleton Top 90
4.2 Connectivity 90
4.2.1 Connecting across the Hierarchy 91
4.2.2 Note to AVM Users 96
4.3 Phases 96
4.4 Config 100
4.4.1 Configuration and Phasing 104
4.5 Factory 106
4.5.1 How the Factory Works 107
4.5.2 The OVM Factory API 113
4.5.3 String-Based or Type-Based? 116
4.6 Shutting Down the Testbench 117
4.6.1 Timeout 120
4.7 Connecting Testbenches to Hardware 121
4.8 Tests and Testbenches 127
4.9 Reporting 128
4.9.1 Basic Messaging 128
4.9.2 Message Actions 130
4.9.3 Message Files 131
4.9.4 Message Handlers 131
4.9.5 Altering the Flow of Control 133
4.10 Summary 136
Testbench Fundamentals 137
5.1 Drivers and Monitors 137
5.2 Introducing the HFPB Protocol 141
5.2.1 HFPB Write Operation 143
5.2.2 Basic Read Operation 144
5.3 An RTL Memory Slave 145
5.4 Monitors and Analysis Ports 148
5.5 Summary 150
Reuse 151
6.1 Types of Reuse (or Reuse of Types) 151
6.2 Reusable Components 152
6.3 Agents 156
6.4 Reusable HFPB Protocol 158
6.5 Agent Example 164
6.6 Summary 166
Complete Testbenches 167
7.1 Floating Point Unit 167
7.2 Coverage Collectors 170
7.3 FPU Agent 172
7.4 Scoreboards 175
7.5 Different Tests 177
7.6 Summary 180
Sequences 181
8.1 Sequence Basics 181
8.2 A Sequence Example 182
8.3 Anatomy of a Sequence 187
8.4 Another Sequence API 189
8.5 Response Routing 191
8.6 Sequences in Parallel 195
8.7 Constructing APIs with Sequences 197
8.8 Summary 200
Block-to-System 201
9.1 Reusing Block-Level Components 201
9.2 Reusing Block-Level Testbenches 203
9.3 Testing at the System Level 209
9.4 Summary 211
Coding Conventions 212
10.1 Naming Scheme 212
10.2 Global or Local? 216
10.3 Objects 219
10.3.1 Components 220
10.3.2 Sequences 222
10.3.3 Transactions and Sequence Items 222
10.4 Packages 223
10.5 Comments 225
10.6 Summary 225
Afterword 227
Graphic Notation 228
A.1 Components 228
A.2 Interfaces 229
A.3 Interconnect 230
A.4 Channels 231
A.5 Analysis Ports 232
A.6 Summary 233
Bibliography 234
Index 236

Produkt-Details

• Erscheint lt. Verlag: 24.7.2009
• Zusatzinfo: XX, 235 p.
• Verlagsort: New York
• Sprache: englisch
• Themenwelt: Informatik ► Weitere Themen ► CAD-Programme
• Themenwelt: Technik ► Elektrotechnik / Energietechnik
• Schlagworte: Architecture • Construction • Creativity • design automation • Electronic Design Automation • Embedded Systems • Functional verification • Mechanics • Modeling • Open Verification Methodology • OVM • Software • Verification Methodology
• ISBN-10: 1-4419-0968-0 / 1441909680
• ISBN-13: 978-1-4419-0968-8 / 9781441909688