Embedded SoPC Design with Nios II Processor and Verilog Examples
John Wiley & Sons Inc (Verlag)
978-1-118-01103-4 (ISBN)
Explores the unique hardware programmability of FPGA-based embedded systems, using a learn-by-doing approach to introduce the concepts and techniques for embedded SoPC design with Verilog
An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as wellallowing us to configure the soft-core processor, create tailored I/O interfaces, and develop specialized hardware accelerators for computation-intensive tasks.
Utilizing an Altera FPGA prototyping board and its Nios II soft-core processor, Embedded SoPC Design with Nios II Processor and Verilog Examples takes a "learn by doing" approach to illustrate the hardware and software design and development process by including realistic projects that can be implemented and tested on the board.
Emphasizing hardware design and integration throughout, the book is divided into four major parts:
Part I covers HDL and synthesis of custom hardware
Part II introduces the Nios II processor and provides an overview of embedded software development
Part III demonstrates the design and development of hardware and software of several complex I/O peripherals, including a PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card
Part IV provides several case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology
While designing and developing an embedded SoPC can be rewarding, the learning can be a long and winding journey. This book shows the trail ahead and guides readers through the initial steps to exploit the full potential of this emerging methodology.
DR. PONG P. CHU is Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.
Preface xxvii
Acknowledgments
1 Overview of Embedded System 1
Part I: Basic Digital Circuits Development
2 Gate-level Combinational Circuit 11
3 Overview of FPGA and EDA Software 25
4 RT-level Combinational Circuit 53
5 Regular Sequential Circuit 93
6 FSM 137
7 FSMD 155
8 Selected Topics of Verilog 188
Part II: Basic Nois II Software Development
9 Nios II Processor Overview 229
10 NIOS II System Derivation and Low-Level Access 237
11 Predesigned Nios II I/O Peripherals 265
12 Predesigned Nios II I/O Drivers and HAL API 303
13 Interrupt and ISR 325
Part III: Custom I/O Peripheral Development
14 Custom I/O Peripheral with PIO Cores 345
15 Avalon Interconnect and SOPC Component 351
16 SRAM and SDRAM Controllers 385
17 PS2 Keyboard and Mouse 423
18 VGA Controller 475
19 Audio Codec Controller 555
20 SD Card Controller 601
Part IV: Hardware Acclerator Case Studies
21 GCD Accelerator 663
22 Mandelbrot Set Fractal Accelerator 681
23 Direct Digital Frequency Synthesis 715
References 741
Topic Index 745
| Verlagsort | New York |
|---|---|
| Sprache | englisch |
| Maße | 178 x 257 mm |
| Gewicht | 1497 g |
| Themenwelt | Informatik ► Weitere Themen ► Hardware |
| Technik ► Elektrotechnik / Energietechnik | |
| ISBN-10 | 1-118-01103-1 / 1118011031 |
| ISBN-13 | 978-1-118-01103-4 / 9781118011034 |
| Zustand | Neuware |
| Haben Sie eine Frage zum Produkt? |
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