Closing the Power Gap between ASIC & Custom

Tools and Techniques for Low Power Design

David Chinnery, Kurt Keutzer (Autoren)

Buch | Softcover

388 Seiten

2010 | Softcover reprint of hardcover 1st ed. 2007
Springer-Verlag New York Inc.
978-1-4419-3833-6 (ISBN)

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This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology.

Important topics include:
- Microarchitectural techniques to reduce energy per operation
- Power reduction with timing slack from pipelining
- Analysis of the benefits of using multiple supply and threshold voltages
- Placement techniques for multiple supply voltages
- Verification for multiple voltage domains
- Improved algorithms for gate sizing, and assignment of supply and threshold voltages
- Power gating design automation to reduce leakage
- Relationships among tatistical timing, power analysis, and parametric yield optimization

Design examples illustrate that these techniques can improve energy efficiency by two to three times.

Overview of the Factors Affecting the Power Consumption.- Pipelining to Reduce the Power.- Voltage Scaling.- Methodology to Optimize Energy of Computation for SOCs.- Linear Programming for Gate Sizing.- Linear Programming for Multi-Vth and Multi-Vdd Assignment.- Power Optimization using Multiple Supply Voltages.- Placement for Power Optimization.- Power Gating Design Automation.- Verification For Multiple Supply Voltage Designs.- Winning the Power Struggle in an Uncertain Era.- Pushing ASIC Performance in a Power Envelope.- Low Power ARM 1136JF-S Design.

Erscheint lt. Verlag	29.10.2010
Zusatzinfo	138 Illustrations, black and white; XII, 388 p. 138 illus.
Verlagsort	New York, NY
Sprache	englisch
Maße	155 x 235 mm
Themenwelt	Informatik ► Weitere Themen ► CAD-Programme
	Informatik ► Weitere Themen ► Hardware
	Technik ► Elektrotechnik / Energietechnik
ISBN-10	1-4419-3833-8 / 1441938338
ISBN-13	978-1-4419-3833-6 / 9781441938336
Zustand	Neuware