Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms
Seiten
2010
|
Softcover reprint of hardcover 1st ed. 2008
Springer (Verlag)
978-90-481-7916-9 (ISBN)
Springer (Verlag)
978-90-481-7916-9 (ISBN)
This book presents a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation.
Computerarchitecturepresentlyfacesanunprecedentedrevolution: Thestep from monolithic processors towards multi-core ICs, motivated by the ever - creasingneedforpowerandenergyef ciencyinnanoelectronics. Whetheryou prefer to call it MPSoC (multi-processor system-on-chip) or CMP (chip mul- processor), no doubt this revolution affects large domains of both computer science and electronics, and it poses many new interdisciplinary challenges. For instance, ef cient programming models and tools for MPSoC are largely an open issue: "Multi-core platforms are a reality - but where is the software support" (R. Lauwereins, IMEC). Solving it will require enormous research efforts as well as the education of a whole new breed of software engineers that bring the results from universities into industrial practice. Atthesametime,thedesignofcomplexMPSoCarchitecturesisanextremely time-consuming task, particularly in the wireless and multimedia application domains, where heterogeneous architectures are predominant.
Due to the - ploding NRE and mask costs most companies are now following a platform approach: Invest a large (but one-time) design effort into a proper core - chitecture, and create easy-to-design derivatives for new standards or product features. Needless to say, only the most ef cient MPSoC platforms have a real chance to enjoy a multi-year lifetime on the highly competitive semiconductor market for embedded systems.
Computerarchitecturepresentlyfacesanunprecedentedrevolution: Thestep from monolithic processors towards multi-core ICs, motivated by the ever - creasingneedforpowerandenergyef ciencyinnanoelectronics. Whetheryou prefer to call it MPSoC (multi-processor system-on-chip) or CMP (chip mul- processor), no doubt this revolution affects large domains of both computer science and electronics, and it poses many new interdisciplinary challenges. For instance, ef cient programming models and tools for MPSoC are largely an open issue: "Multi-core platforms are a reality - but where is the software support" (R. Lauwereins, IMEC). Solving it will require enormous research efforts as well as the education of a whole new breed of software engineers that bring the results from universities into industrial practice. Atthesametime,thedesignofcomplexMPSoCarchitecturesisanextremely time-consuming task, particularly in the wireless and multimedia application domains, where heterogeneous architectures are predominant.
Due to the - ploding NRE and mask costs most companies are now following a platform approach: Invest a large (but one-time) design effort into a proper core - chitecture, and create easy-to-design derivatives for new standards or product features. Needless to say, only the most ef cient MPSoC platforms have a real chance to enjoy a multi-year lifetime on the highly competitive semiconductor market for embedded systems.
Both Prof. Heinrich Meyr and Prof. Rainer Leupers have (co-)authored numerous books for Springer
SOC Design Methodologies.- Communication Modeling.- Processor Modeling.- Processor System Integration.- Successive Top-Down Refinement Flow.- Automatic Retargetability.- Debugging and Profiling.- Case Study.- Summary.
| Erscheint lt. Verlag | 19.10.2010 |
|---|---|
| Zusatzinfo | XIV, 162 p. |
| Verlagsort | Dordrecht |
| Sprache | englisch |
| Maße | 155 x 235 mm |
| Themenwelt | Mathematik / Informatik ► Informatik ► Netzwerke |
| Informatik ► Theorie / Studium ► Künstliche Intelligenz / Robotik | |
| Technik ► Elektrotechnik / Energietechnik | |
| ISBN-10 | 90-481-7916-5 / 9048179165 |
| ISBN-13 | 978-90-481-7916-9 / 9789048179169 |
| Zustand | Neuware |
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