On-Chip Interconnect with aelite
Composable and Predictable Systems
Seiten
2010
Springer-Verlag New York Inc.
978-1-4419-6496-0 (ISBN)
Springer-Verlag New York Inc.
978-1-4419-6496-0 (ISBN)
The book provides a comprehensive description and implementation methodology for the Philips/NXP Aethereal/aelite Network-on-Chip (NoC). The presentation offers a systems perspective, starting from the system requirements and deriving and describing the resulting hardware architectures, embedded software, and accompanying design flow. Readers get an in depth view of the interconnect requirements, not centered only on performance and scalability, but also the multi-faceted, application-driven requirements, in particular composability and predictability. The book shows how these qualitative requirements are implemented in a state-of-the-art on-chip interconnect, and presents the realistic, quantitative costs.
Introduction; Proposed Solution; Dimensioning; Allocation; Instantiation; Verification; Case Study; Related Work; Conclusions and Future Work.
Reihe/Serie | Embedded Systems |
---|---|
Zusatzinfo | X, 210 p. |
Verlagsort | New York, NY |
Sprache | englisch |
Maße | 155 x 235 mm |
Themenwelt | Informatik ► Weitere Themen ► CAD-Programme |
Technik ► Elektrotechnik / Energietechnik | |
ISBN-10 | 1-4419-6496-7 / 1441964967 |
ISBN-13 | 978-1-4419-6496-0 / 9781441964960 |
Zustand | Neuware |
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