CMOS IC Layout (eBook)

Concepts, Methodologies, and Tools

Dan Clein (Autor)

eBook Download: PDF

1999 | 1. Auflage
288 Seiten
Elsevier Science (Verlag)
978-0-08-050211-3 (ISBN)

Infos

This book includes basic methodologies, review of basic electrical rules and how they apply, design rules, IC planning, detailed checklists for design review, specific layout design flows, specialized block design, interconnect design, and also additional information on design limitations due to production requirements.

*Practical, hands-on approach to CMOS layout theory and design

*Offers engineers and technicians the training materials they need to stay current in circuit design technology.

*Covers manufacturing processes and their effect on layout and design decisions

Inhalt

Cover 1
CONTENTS 8
Preface 12
Acknowledgments 18
CHAPTER 1. INTRODUCTION 22
1.1 History of the Profession 22
1.2 What Is Layout Design? 23
1.3 IC Design Flow 25
CHAPTER 2. SCHEMATIC FUNDAMENTALS 28
2.1 The MOS Transistor: The Basic Circuit Structure 28
2.2 Logic Gates 31
2.3 Transmission Gates 37
2.4 Understanding the Schematic Connectivity 38
2.5 Review of Fundamental Electrical Laws 39
CHAPTER 3. LAYOUT DESIGN 43
3.1 Introduction to CMOS VLSI Manufacturing Processes 43
3.2 Layers and Connectivity 44
3.3 Introduction to Transistor Layout 49
3.4 Process Design Rules 56
3.5 Vertical Connection Diagram 62
3.6 A General Procedure to Follow 63
3.7 Preparing to Start 64
3.8 General Guidelines 71
3.9 Implementing the Design 80
3.10 Verification 84
3.11 Final Steps 86
CHAPTER 4. LAYOUT DESIGN FLOWS 89
4.1 What Is a Flow? 89
4.2 Microprocessor Design Flow 92
4.3 ASSPs 94
4.4 Memories 98
4.5 System on a Chip, or SOC 99
4.6 CAD Tools as Part of a Flow 100
CHAPTER 5. ADVANCED TECHNIQUES FOR SPECIALIZED BUILDING-BLOCK LAYOUT DESIGN 112
5.1 Standard Cell Libraries 112
5.2 Special Logic Cells 128
5.3 Pad Cells 135
5.4 Memory Design Leaf Cells 144
5.5 Laser Fuse Cells 150
5.6 Chip Finishing Cells 153
CHAPTER 6. ADVANCED TECHNIQUES FOR BUILDING-BLOCK INTERCONNECT LAYOUT DESIGN 158
6.1 Power Grid 159
6.2 Clock Signals 162
6.3 Interconnect Routing 164
CHAPTER 7. LAYOUT DESIGN TECHNIQUES TO ADDRESS ELECTRICAL CHARACTERISTICS 175
7.1 Resistance 175
7.2 Capacitance 180
7.3 Symmetry 190
7.4 Special Electrical Requirements 196
CHAPTER 8. LAYOUT CONSIDERATIONS DUE TO PROCESS CONSTRAINTS 204
8.1 Wide Metal Slits 204
8.2 Large Metal via Implementations 207
8.3 Step Coverage Rules 208
8.4 Multiple Rule Sets 210
8.5 Antenna Rules 212
8.6 Special Design Rules 213
8.7 Latch-Up 216
CHAPTER 9. LAYOUT DESIGN TECHNIQUES IN AN UNCERTAIN ENVIRONMENT 222
9.1 Layout of Circuits Designed for Change 222
9.2 Planning for Unknown Changes 228
9.3 Engineering Change Orders 232
9.4 Guidelines for Proper Layout 234
CHAPTER 10. COMPUTER-AIDED DESIGN (CAD) TOOLS FOR LAYOUT 237
10.1 Introduction 237
10.2 Planning Tools 240
10.3 Layout Generation Tools 245
10.4 Support Tools 257
Appendices 266
Index 278
File Directory 285

Produkt-Details

• Erscheint lt. Verlag: 7.1.1999
• Sprache: englisch
• Themenwelt: Kunst / Musik / Theater ► Design / Innenarchitektur / Mode
• Themenwelt: Technik ► Elektrotechnik / Energietechnik
• ISBN-10: 0-08-050211-3 / 0080502113
• ISBN-13: 978-0-08-050211-3 / 9780080502113